SCLSA09 June   2024 SN74LVC2G101

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Noise Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 CMOS Schmitt-Trigger Inputs
      3. 7.3.3 Latching Logic
      4. 7.3.4 Partial Power Down (Ioff)
      5. 7.3.5 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Reference
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • BQB|16
  • PW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC -40°C to 125°C UNIT
MIN TYP MAX
VT+ Positive-going input threshold voltage 1.1V 0.5 0.64 0.8 V
1.2V 0.53 0.72 0.9 V
1.5V 0.7 0.86 1.11 V
1.65V 0.4 0.93 1.3 V
1.95V 0.6 1.07 1.5 V
2.3V 0.8 1.22 1.7 V
2.5V 0.8 1.3 1.7 V
2.7V 0.8 1.38 2 V
3V 0.9 1.5 2 V
3.6V 1.1 1.76 2 V
VT- Negative-going input threshold voltage 1.1V 0.2 0.31 0.6 V
1.2V 0.26 0.46 0.65 V
1.5V 0.34 0.42 0.75 V
1.65V 0.2 0.47 0.9 V
1.95V 0.3 0.56 1 V
2.3V 0.4 0.68 1.2 V
2.5V 0.4 0.74 1.2 V
2.7V 0.4 0.81 1.4 V
3V 0.6 0.91 1.5 V
3.6V 0.8 1.1 1.7 V
ΔVT Hysteresis (VT+ − VT−) 1.1V 0.07 0.34 0.53 V
1.2V 0.08 0.31 0.54 V
1.5V 0.18 0.43 0.60 V
1.65V 0.1 0.46 1.2 V
1.95V 0.2 0.51 1.3 V
2.3V 0.3 0.54 1.3 V
2.5V 0.3 0.56 1.3 V
2.7V 0.3 0.58 1.1 V
3V 0.3 0.6 1.2 V
3.6V 0.3 0.66 1.2 V
VOH IOH= –100μA 1.1V to 3.6V VCC - 0.2 VCC - 0.01 V
VOH IOH= –4mA 1.65V 1.2 V
VOH IOH= –8mA 2.3V 1.75 V
VOH IOH= –12mA 2.7V 2.2 V
VOH 3V 2.4 V
VOH IOH= –24mA 3V 2.2 V
VOL IOL = 100μA 1.1V to 3.6V 0.01 0.2 V
VOL IOL = 4mA 1.65V 0.45 V
VOL IOL = 8mA 2.3V 0.7 V
VOL IOL = 12mA 2.7V 0.4 V
VOL IOL = 24mA 3V 0.55 V
II VI = VCC or GND 3.6V ±5 µA
Ioff VI or VO = VCC 0V ±10 µA
ICC VI = VCC or GND, IO = 0 3.6V 40 µA
ΔICC One input at VCC - 0.6V, other inputs at VCC or GND 2.7V to 3.6V 5000 µA
CI VI = VCC or GND 3.3V 4.9 pF
CO VO = VCC or GND 3.3V 6.3 pF
CPD f = 10MHz 1.8V 12 pF
CPD f = 10MHz 2.5V 15 pF
CPD f = 10MHz 3.3V 17 pF