SCES207N April   1999  – March 2019 SN74LVC2G157

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Logic Diagram (Positive Logic)
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Standard CMOS Inputs
      2. 8.3.2 Balanced High-Drive CMOS Push-Pull Outputs
      3. 8.3.3 Negative Clamping Diodes
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power
        2. 9.2.1.2 Inputs
        3. 9.2.1.3 Outputs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
  • YZP|8
  • DCT|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3 Recommended Operating Conditions

See (1).
MIN MAX UNIT
VCC Supply voltage Operating 1.65 5.5 V
Data retention only 1.5
VIH High-level input voltage VCC = 1.65 V to 1.95 V 0.65 × VCC V
VCC = 2.3 V to 2.7 V 1.7
VCC = 3 V to 3.6 V 2
VCC = 4.5 V to 5.5 V 0.7 × VCC
VIL Low-level input voltage VCC = 1.65 V to 1.95 V 0.35 × VCC V
VCC = 2.3 V to 2.7 V 0.7
VCC = 3 V to 3.6 V 0.8
VCC = 4.5 V to 5.5 V 0.3 × VCC
VI Input voltage 0 5.5 V
VO Output voltage 0 VCC V
IOH High-level output current VCC = 1.65 V –4 mA
VCC = 2.3 V –8
VCC = 3 V –16
–24
VCC = 4.5 V –32
IOL Low-level output current VCC = 1.65 V 4 mA
VCC = 2.3 V 8
VCC = 3 V 16
24
VCC = 4.5 V 32
Δt/Δv Input transition rise or fall rate VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20 ns/V
VCC = 3.3 V ± 0.3 V 10
VCC = 5 V ± 0.5 V 5
TA Operating free-air temperature –40 85 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004.