SCES818C September   2010  – July 2024 SN74LVC2T45-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics: VCCA = 1.8V ± 0.15V
    7. 5.7  Switching Characteristics: VCCA = 2.5V ± 0.2V
    8. 5.8  Switching Characteristics: VCCA = 3.3V ± 0.3V
    9. 5.9  Switching Characteristics: VCCA = 5V ± 0.5V
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65V to 5.5V Power-Supply Range
      2. 7.3.2 Support High-Speed Translation
      3. 7.3.3 Ioff Supports Partial-Power-Down Mode Operation
      4. 7.3.4 Balanced High-Drive CMOS Push-Pull Outputs
      5. 7.3.5 Glitch-Free Power Supply Sequencing
      6. 7.3.6 Vcc Isolation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Logic Level-Shifting Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Logic Level-Shifting Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Enable Times
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-Up Consideration
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
Thermal pad, mechanical data (Package|Pins)

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
VCCIVCCOMINMAXUNIT
VCCASupply voltage1.655.5V
VCCB1.655.5
VIHHigh-level
input voltage		Data inputs(4)1.65V to 1.95VVCCI × 0.65V
2.3V to 2.7V1.7
3V to 3.6V2
4.5V to 5.5VVCCI × 0.7
VILLow-level
input voltage		Data inputs(4)1.65V to 1.95VVCCI × 0.35V
2.3V to 2.7V0.7
3V to 3.6V0.8
4.5V to 5.5VVCCI × 0.3
VIHHigh-level
input voltage		DIR
(referenced to VCCA)(5)		1.65V to 1.95VVCCA × 0.65V
2.3V to 2.7V1.7
3V to 3.6V2
4.5V to 5.5VVCCA × 0.7
VILLow-level
input voltage		DIR
(referenced to VCCA)(5)		1.65V to 1.95VVCCA × 0.35V
2.3V to 2.7V0.7
3V to 3.6V0.8
4.5V to 5.5VVCCA × 0.3
VIInput voltage05.5V
VOOutput voltage0VCCOV
IOHHigh-level output current1.65V to 1.95V–4mA
2.3V to 2.7V–8
3V to 3.6V–24
4.5V to 5.5V–32
IOLLow-level output current1.65V to 1.95V4mA
2.3V to 2.7V8
3V to 3.6V24
4.5V to 5.5V32
Δt/ΔvInput transition
rise or fall rate		Data inputs1.65V to 1.95V20ns/V
2.3V to 2.7V20
3V to 3.6V10
4.5V to 5.5V5
Control input1.65V to 5.5V5
TAOperating free-air temperature–40125°C
(1) VCCI is the VCC associated with the input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused data inputs of the device must be held at VCCI or GND for proper device operation. See Implications of Slow or Floating CMOS Inputs, SCBA004.
(4) For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7V, VIL max = VCCI × 0.3V.
(5) For VCCI values not specified in the data sheet, VIH min = VCCA × 0.7V, VIL max = VCCA × 0.3V.