SCES818C September 2010 – July 2024 SN74LVC2T45-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing without any ramp order requirements.
This device was designed with various power supply sequencing methods in mind to help prevent unintended triggering of downstream devices, as described in Glitch-free Power Supply Sequencing.