SCAS306K March   1993  – December 2014 SN74LVC827A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description/Ordering Information
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics, -40°C to 85°C
    7. 6.7 Switching Characteristics, -40°C to 125°C
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGV|24
  • DB|24
  • DW|24
  • PW|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The SN74LVC827A is a high-drive CMOS device that can be used for a multitude of bus interface type applications where the data needs to be retained. It can produce 24 mA of drive current at 3.3 V, thus making this device ideal for driving multiple outputs and for high-speed applications up to 150 MHz. The inputs are 5.5-V tolerant, allowing the device to translate down to VCC.

9.2 Typical Application

app_sche_cas306.gifFigure 4. Typical Application Schematic

9.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads; therefore, routing and load conditions should be considered to prevent ringing.

9.2.2 Detailed Design Procedure

  1. Recommended Input Conditions:
  2. Recommend Output Conditions:
    • Load currents should not exceed 50 mA per output and 100 mA total for the part.
    • Outputs should not be pulled above VCC.

9.2.3 Application Curves

D003_SCAS306.gifFigure 5. ICC vs Frequency