SCAS584N November   1996  – December 2022 SN74LVCC4245A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Power-Up Consideration
  8. 8 Parameter Measurement Information For A to B VCCA = 4.5 V to 5.5 V and VCCB = 2.7 V to 3.6 V
  9. 9 Parameter Measurement Information For A to B VCCA = 4.5 V to 5.5 V and VCCB = 3.6 V to 5.5 V
  10. 10Parameter Measurement Information For B to A VCCA = 4.5 V to 5.5 V and VCCB = 2.7 V to 3.6 V
  11. 11Parameter Measurement Information For B to A VCCA = 4.5 V to 5.5 V and VCCB = 3.6 V to 5.5 V
  12. 12Detailed Description
    1. 12.1 Overview
    2. 12.2 Functional Block Diagram
    3. 12.3 Feature Description
    4. 12.4 Device Functional Modes
  13. 13Application and Implementation
    1. 13.1 Application Information
    2. 13.2 Typical Application
      1. 13.2.1 Design Requirements
      2. 13.2.2 Detailed Design Procedure
      3. 13.2.3 Application Curves
  14. 14Power Supply Recommendations
  15. 15Layout
    1. 15.1 Layout Guidelines
    2. 15.2 Layout Example
  16. 16Device and Documentation Support
    1. 16.1 Documentation Support
      1. 16.1.1 Related Documentation
    2. 16.2 Receiving Notification of Documentation Updates
    3. 16.3 Support Resources
    4. 16.4 Trademarks
    5. 16.5 Electrostatic Discharge Caution
    6. 16.6 Glossary
  17. 17Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

15.1 Layout Guidelines

When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states.

Specified in Figure 15-1 are rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient.