SCES920B September   2020  – March 2023 SN74LXC8T245-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCCA = 1.2 ± 0.1 V
    7. 6.7  Switching Characteristics, VCCA = 1.5 ± 0.1 V
    8. 6.8  Switching Characteristics, VCCA = 1.8 ± 0.15 V
    9. 6.9  Switching Characteristics, VCCA = 2.5 ± 0.2 V
    10. 6.10 Switching Characteristics, VCCA = 3.3 ± 0.3 V
    11. 6.11 Switching Characteristics, VCCA = 5.0 ± 0.5 V
    12. 6.12 Switching Characteristics: Tsk, TMAX
    13. 6.13 Operating Characteristics
    14. 6.14 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Load Circuit and Voltage Waveforms
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
        1. 8.3.1.1 I/Os with Integrated Dynamic Pull-Down Resistors
        2. 8.3.1.2 Control Inputs with Integrated Static Pull-Down Resistors
      2. 8.3.2 Balanced High-Drive CMOS Push-Pull Outputs
      3. 8.3.3 Partial Power Down (Ioff)
      4. 8.3.4 VCC Isolation and VCC Disconnect (Ioff-float)
      5. 8.3.5 Over-Voltage Tolerant Inputs
      6. 8.3.6 Glitch-Free Power Supply Sequencing
      7. 8.3.7 Negative Clamping Diodes
      8. 8.3.8 Fully Configurable Dual-Rail Design
      9. 8.3.9 Supports High-Speed Translation
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-94F1890B-65FB-4149-9E66-91541CCAADA7-low.gif
All packages are on the same relative scale.
Figure 5-1 PW, DGS, and RHL Package, 24-Pin TSSOP, VSSOP, and VQFN (Transparent Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME PW, DGS, RHL
A1 3 I/O Input or output A1. Referenced to VCCA.
A2 4 I/O Input or output A2. Referenced to VCCA.
A3 5 I/O Input or output A3. Referenced to VCCA.
A4 6 I/O Input or output A4. Referenced to VCCA.
A5 7 I/O Input or output A5. Referenced to VCCA.
A6 8 I/O Input or output A6. Referenced to VCCA.
A7 9 I/O Input or output A7. Referenced to VCCA.
A8 10 I/O Input or output A8. Referenced to VCCA.
B1 21 I/O Input or output B1. Referenced to VCCB.
B2 20 I/O Input or output B2. Referenced to VCCB.
B3 19 I/O Input or output B3. Referenced to VCCB.
B4 18 I/O Input or output B4. Referenced to VCCB.
B5 17 I/O Input or output B5. Referenced to VCCB.
B6 16 I/O Input or output B6. Referenced to VCCB.
B7 15 I/O Input or output B7. Referenced to VCCB.
B8 14 I/O Input or output B8. Referenced to VCCB.
DIR 2 I Direction-control signal for all ports. Referenced to VCCA.
GND 11 Ground.
12 Ground.
13 Ground.
OE 22 I Output Enable. Pull to GND to enable all outputs. Pull to VCCA to place all outputs in high-impedance mode. Referenced to VCCA.
VCCA 1 A-port supply voltage. 1.1 V ≤ VCCA ≤ 5.5 V.
VCCB 23 B-port supply voltage. 1.1 V ≤ VCCB ≤ 5.5 V.
24 B-port supply voltage. 1.1 V ≤ VCCB ≤ 5.5 V.
PAD Thermal pad. May be grounded (recommended) or left floating.
I = input, O = output