SLLS266J February   1997  – August 2022 SN65220 , SN65240 , SN75240

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The SN65220 device is a dual, and the SN65240 and SN75240 devices are quadruple, unidirectional transient voltage suppressors (TVS). These devices provide electrical noise transient protection to Universal Serial Bus (USB) low and full-speed ports. The input capacitance of 35 pF makes it unsuitable for high-speed USB 2.0 applications.

Any cabled I/O can be subjected to electrical noise transients from various sources. These noise transients can cause damage to the USB transceiver or the USB ASIC if they are of sufficient magnitude and duration.

The SN65220, SN65240, and SN75240 devices ESD performance is measured at the system level, according to IEC61000-4-2; system design, however, impacts the results of these tests. To accomplish a high compliance level, careful board design and layout techniques are required.

Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SN65220 SOT-23 (6) 2.90 mm × 1.60 mm
DSBGA (4) 0.925 mm × 0.925 mm
SN65240
SN75240
PDIP (8) 9.09 mm × 6.35 mm
TSSOP (8) 3.00 mm × 4.40 mm
See the orderable addendum at the end of the data sheet for all available packages.
GUID-FF54DE55-F2FC-45B1-99A2-7988FF467DA5-low.gifSimplified Schematic
GUID-103A3E72-303B-4531-8F4E-3F33100A9004-low.gifTVS Current vs Voltage