SLLSE12A November   2009  – July 2014 SN75DP119

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Pre-Emphasis and VOD Output Swing Setings
    4. 9.4 Device Functional Modes
      1. 9.4.1 Status Detect and Operating Modes Flow Diagram
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Layout

12.1 Layout Guidelines

  • Data rates of 2.7Gbps require fast edge rate, which can cause EMI radiation if the pcb is not designed carefully.
  • Decoupling with small current loops is recommended.
  • It is recommended to place the de-coupling cap as close as possible to the device and on the same side of the pcb (see Figure 12).
  • Choose the capacitor such that the resonant frequency of the capacitor does not align closely with 2.7GHz.
  • Also provide several GND vias to the thermal pad to minimize the area of current loops.

12.2 Layout Example

de_coupling_llse12.gifFigure 12. De-Coupling Layout Recommendation