SLLS447D October   2000  – April 2024 SN65LBC172A , SN75LBC172A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Dissipation Rating Table
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Device Functional Modes
      1. 7.1.1 Function Table
      2. 7.1.2 Equivalent Input and Output Schematic Diagrams
  9. 8 Application and Implementation
    1. 8.1 Application Information
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DW|16
  • N|16
  • DW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Dissipation Rating Table

PACKAGE JEDEC BOARD MODEL TA ≤ 25°C POWER RATING DERATING FACTOR(1) ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING
16-PIN DW Low K 1200mW 9.6mW/°C 769mW 625mW
High K 2240mW 17.9mW/°C 1434mW 1165mW
20-PIN DW Low K 1483mW 11.86mW/°C 949mW 771mW
High K 2753mW 22mW/°C 1762mW 1432mW
16-PIN N Low K 1150mW 9.2mW/°C 736mW 598mW
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted with no air flow.