SLLSE63A December   2010  – May 2016 SN75LVCP600

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Equalization
      2. 9.3.2 Auto Low Power (ALP) Mode
      3. 9.3.3 Out-of-Band (OOB) Support
    4. 9.4 Device Functional Modes
      1. 9.4.1 Active
      2. 9.4.2 Squelch
      3. 9.4.3 Auto Low Power
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Return Current and Plane References
      2. 12.1.2 Split Planes - What to Avoid
      3. 12.1.3 Avoiding Crosstalk
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

The SN75LVCP600 is a single-channel SATA redriver and signal conditioner supporting data rates up to 6 Gbps. The inputs incorporate an out-of-band (OOB) detector, which automatically squelches the output while maintaining a stable common-mode voltage compliant to the SATA link.

10.2 Typical Application

SN75LVCP600 typ_dev_imp_llse63.gif Figure 10. Typical Device Implementation

10.2.1 Design Requirements

This design requires layout flexibility to place 0-Ω resistors. If a redriver is needed, go to step 3 in Detailed Design Procedure.

Table 2. Design Parameters

DESIGN PARAMETER VALUE
VCC 3.3 V
ICC 29 mA
Input voltage 120 mVpp to 1.6 Vpp
Output voltage 400 mVpp to 900 mVpp

10.2.2 Detailed Design Procedure

The LVCP600 allows the user to take the guess work of using a signal conditioning device in a SATA link. With the SN75LVCP600, the user has the option to use or remove the device based on signal conditioning needs. See Figure 11.

SN75LVCP600 Imp_guide_llse63.gif Figure 11. Implementation Guideline

Figure 13 through Figure 22 show SN75LVCP600 typical performance plots when connected to various trace lengths with VCC = 3.3 V and TA = 25°C. All eye diagrams measured using K28.5 pattern at 6 Gbps. Figure 12 shows the setup for the performance plots in Application Curves.

SN75LVCP600 test_points_llse63.gif Figure 12. Test Points

10.2.3 Application Curves

SN75LVCP600 EP1_llse63.gif
DE = 1 EQ = 0
Figure 13. Eye Pattern at A → X = 8”; Y = 2”
SN75LVCP600 EP3_llse63.gif
DE = 1 EQ = 0
Figure 15. Eye Pattern at A → X = 16”; Y = 2”
SN75LVCP600 EP5_llse63.gif
DE = 1 EQ = 0
Figure 17. Eye Pattern at A → X = 24”; Y = 2”
SN75LVCP600 EP7_llse63.gif
DE = 1 EQ = 1
Figure 19. Eye Pattern at A → X = 32”; Y = 2”
SN75LVCP600 EP9_llse63.gif
DE = 1 EQ = 1
Figure 21. Eye Pattern at A → X = 40”; Y = 2”
SN75LVCP600 EP2_llse63.gif
DE = 1 EQ = 0
Figure 14. Eye Pattern at B → X = 8”; Y = 2”
SN75LVCP600 EP4_llse63.gif
DE = 1 EQ = 0
Figure 16. Eye Pattern at B → X = 16”; Y = 2”
SN75LVCP600 EP6_llse63.gif
DE = 1 EQ = 0
Figure 18. Eye Pattern at B→ X = 24”; Y = 2”
SN75LVCP600 EP8_llse63.gif
DE = 1 EQ = 1
Figure 20. Eye Pattern at B → X = 32”; Y = 2”
SN75LVCP600 EP10_llse63.gif
DE = 1 EQ = 1
Figure 22. Eye Pattern at B → X = 40”; Y = 2”