SLLS259J
November 1996 – October 2016
SN75LVDS82
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Switching Characteristics
7.8
Typical Characteristics
8
Parameter Measurement Information
8.1
Equivalent Input and Output Schematic Diagrams
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
LVDS Input Data
9.4
Device Functional Modes
9.4.1
Low Power Mode
9.4.2
Test Patterns
10
Application and Implementation
10.1
Application Information
10.2
Typical Applications
10.2.1
Signal Connectivity
10.2.1.1
Design Requirements
10.2.1.2
Detailed Design Procedure
10.2.1.2.1
Power Up Sequence
10.2.1.3
Application Curves
11
Power Supply Recommendations
11.1
Decoupling Capacitor Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Receiving Notification of Documentation Updates
13.2
Community Resources
13.3
Trademarks
13.4
Electrostatic Discharge Caution
13.5
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DGG|56
MPDS570
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slls259j_oa
slls259j_pm
8
Parameter Measurement Information
8.1
Equivalent Input and Output Schematic Diagrams
Figure 8.
LVDS Input
Figure 9.
SHTDN
Input
Figure 10.
Output
Figure 11.
Voltage Definitions