SLLSEW8
September 2016
SN75LVPE801
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
SATA Express
9.3.2
Receiver Termination
9.3.3
Receiver Internal Bias
9.3.4
Receiver Equalization
9.3.5
OOB/Squelch
9.3.6
Auto Low Power
9.3.7
Transmitter Output Signal
9.3.8
Transmitter Common Mode
9.3.9
De-Emphasis
9.3.10
Transmitter Termination
9.4
Device Functional Modes
9.4.1
Active
9.4.2
Squelch
9.4.3
Auto Low Power
10
Applications and Implementation
10.1
Application Information
10.2
Typical SATA Applications
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curves
10.2.4
SATA Express Applications
10.2.4.1
Design Requirements
10.2.4.2
Detailed Design Procedure
10.2.4.3
Application Curve
10.2.5
PCIe Applications
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.1.1
Return Current and Plane References
12.1.2
Split Planes - What to Avoid
12.1.3
Avoiding Crosstalk
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.1.1
Third-Party Products Disclaimer
13.2
Receiving Notification of Documentation Updates
13.3
Community Resources
13.4
Trademarks
13.5
Electrostatic Discharge Caution
13.6
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DRF|8
MPDS150D
Thermal pad, mechanical data (Package|Pins)
DRF|8
QFND080G
Orderable Information
sllsew8_oa
sllsew8_pm
8 Parameter Measurement Information
Figure 6. TX, RX Differential Return Loss Limits
Figure 7. Jitter Measurement Test Condition