SLASF30 January   2022 TAA5212

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements: I2C Interface
    7. 6.7  Switching Characteristics: I2C Interface
    8. 6.8  Timing Requirements: SPI Interface
    9. 6.9  Switching Characteristics: SPI Interface
    10. 6.10 Timing Requirements: TDM, I2S or LJ Interface
    11. 6.11 Switching Characteristics: TDM, I2S or LJ Interface
    12. 6.12 Timing Requirements: PDM Digital Microphone Interface
    13. 6.13 Switching Characteristics: PDM Digial Microphone Interface
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Hardware Control
      2. 8.3.2 Serial Interfaces
        1. 8.3.2.1 Control Serial Interfaces
        2. 8.3.2.2 Audio Serial Interfaces
          1. 8.3.2.2.1 Time Division Multiplexed Audio (TDM) Interface
          2. 8.3.2.2.2 Inter IC Sound (I2S) Interface
          3. 8.3.2.2.3 Left-Justified (LJ) Interface
        3. 8.3.2.3 Using Multiple Devices With Shared Buses
      3. 8.3.3 Phase-Locked Loop (PLL) and Clock Generation
      4. 8.3.4 Input Channel Configurations
      5. 8.3.5 Reference Voltage
      6. 8.3.6 Programmable Microphone Bias
      7. 8.3.7 Signal-Chain Processing
        1. 8.3.7.1 ADC Signal-Chain
          1. 8.3.7.1.1 Programmable Channel Gain and Digital Volume Control
          2. 8.3.7.1.2 Programmable Channel Gain Calibration
          3. 8.3.7.1.3 Programmable Channel Phase Calibration
          4. 8.3.7.1.4 Programmable Digital High-Pass Filter
          5. 8.3.7.1.5 Programmable Digital Biquad Filters
          6. 8.3.7.1.6 Programmable Channel Summer and Digital Mixer
          7. 8.3.7.1.7 Configurable Digital Decimation Filters
            1. 8.3.7.1.7.1 Linear Phase Filters
              1. 8.3.7.1.7.1.1 Sampling Rate: 16 kHz or 14.7 kHz
              2. 8.3.7.1.7.1.2 Sampling Rate: 24 kHz or 22.05 kHz
              3. 8.3.7.1.7.1.3 Sampling Rate: 32 kHz or 29.4 kHz
              4. 8.3.7.1.7.1.4 Sampling Rate: 48 kHz or 44.1 kHz
              5. 8.3.7.1.7.1.5 Sampling Rate: 96 kHz or 88.2 kHz
      8. 8.3.8 Interrupts, Status, and Digital I/O Pin Multiplexing
      9. 8.3.9 Programmable Channel Phase Calibration
    4. 8.4 Device Functional Modes
    5. 8.5 Register Maps
      1. 8.5.1 VEGA Registers
      2. 8.5.2 TAA5212 Registers
      3. 8.5.3 TAA5212 Registers
    6. 8.6 Feature Description
    7. 8.7 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Performance Plots
      5. 9.2.5 What to Do and What Not to Do
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.4 Input Channel Configurations

The device consists of two pairs of analog input pins (INxP and INxM) that can be configured as differential inputs or single-ended inputs for the recording channel. The device supports simultaneous recording of up to two channels using the high-performance multichannel ADC. The input source for the analog pins can be from electret condenser analog microphones, microelectrical-mechanical system (MEMS) analog microphones, or line-in (auxiliary) inputs from the system board. Analog inputs support differential input, single-ended inputs(two pin and one-pin) with AC and DC coupling options. Additionally, if the application uses digital PDM microphones for the recording, GPIO,GPI and GPO pins can be reconfigured in the device to support up to four channels for the digital microphone recording. TAA5212 supports incremental mode of ADC where analog input channels can be used for DC measurements. This can be configured by setting IADC_EN(P0_R81_D7). Table 8-8 shows the input source selection for the record channel.

Table 8-8 Input Source Selection for the Record Channel
P0_R80_D[7:6] : ADC_CH1_INSRC[1:0]INPUT CHANNEL 1 RECORD SOURCE SELECTION
00 (default)Analog differential input for channel 1
01Analog single-ended Input for channel 1 (Signal on one input pin and Ground on other pin)
10Analog single-ended Input on IN1P
11Analog single-ended Input on IN1M

Similarly, the input source selection setting for input channel 2 can be configured using the ADC_CH2_INSRC[1:0] (P0_R85_D[7:6]) register bits.

Typically, voice or audio signal inputs are capacitively coupled (AC-coupled) to the device; however, the device also supports an option for DC-coupled inputs to save board space. This configuration can be done independently for each channel by setting the input common mode tolerance in ADC_CH1_CM_TOL (P0_R60_D[3:2]), ADC_CH2_CM_TOL(P0_R85_D[3:2]) register bits. The INM pin can be directly grounded in Rail to Rail Common Mode (see Figure 8-15), but the INM pin must be grounded after the AC-coupling capacitor whenever ADC_CHx_INSRC is set to 2'b01 and ADC_CHx_CM_TOL is set to 2'b01(see Figure 8-16) for the single-ended input configuration. For the best dynamic range performance, the differential AC-coupled input must be used .

GUID-20231210-SS0I-LQSR-R4FK-J4FPC18M6Q9N-low.svgFigure 8-15 Single-Ended DC-Coupled Input Connection
GUID-20231210-SS0I-5CDQ-D09W-FP7XHH0FZMB2-low.svgFigure 8-16 Single-Ended AC-Coupled Input Connection

The device allows for flexibility in choosing the typical input impedance on INxP or INxM from 5 kΩ (default), 10 kΩ, and 40 kΩ based on the input source impedance. The higher input impedance results in slightly higher noise or lower dynamic range. Table 8-9 lists the configuration register settings for the input impedance for the record channel.

Table 8-9 Input Impedance Selection for the Record Channel
P0_R80_D[5:4] : ADC_CH1_IMP[1:0]CHANNEL 1 INPUT IMPEDANCE SELECTION
00 (default)Channel 1 input impedance typical value is 5 kΩ on INxP or INxM
01Channel 1 input impedance typical value is 10 kΩ on INxP or INxM
10Channel 1 input impedance typical value is 40 kΩ on INxP or INxM
11Reserved (do not use this setting)

Similarly, the input impedance selection setting for input channel 2 can be configured using the ADC_CH2_IMP[1:0] (P0_R85_D[5:4]).

The value of the coupling capacitor in AC-coupled mode must be chosen so that the high-pass filter formed by the coupling capacitor and the input impedance do not affect the signal content. Before proper recording can begin, this coupling capacitor must be charged up to the common-mode voltage at power-up. To enable quick charging, the device has modes to speed up the charging of the coupling capacitor. The default value of the quick-charge timing is set for a coupling capacitor up to 1 µF. However, if a higher-value capacitor is used in the system, then the quick-charging timing can be increased by using the INCAP_QCHG (P0_R5_D[7:6]) register bits. For best distortion performance, use the low-voltage coefficient capacitors for AC coupling.