SLASF30
January 2022
TAA5212
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements: I2C Interface
6.7
Switching Characteristics: I2C Interface
6.8
Timing Requirements: SPI Interface
6.9
Switching Characteristics: SPI Interface
6.10
Timing Requirements: TDM, I2S or LJ Interface
6.11
Switching Characteristics: TDM, I2S or LJ Interface
6.12
Timing Requirements: PDM Digital Microphone Interface
6.13
Switching Characteristics: PDM Digial Microphone Interface
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Hardware Control
8.3.2
Serial Interfaces
8.3.2.1
Control Serial Interfaces
8.3.2.2
Audio Serial Interfaces
8.3.2.2.1
Time Division Multiplexed Audio (TDM) Interface
8.3.2.2.2
Inter IC Sound (I2S) Interface
8.3.2.2.3
Left-Justified (LJ) Interface
8.3.2.3
Using Multiple Devices With Shared Buses
8.3.3
Phase-Locked Loop (PLL) and Clock Generation
8.3.4
Input Channel Configurations
8.3.5
Reference Voltage
8.3.6
Programmable Microphone Bias
8.3.7
Signal-Chain Processing
8.3.7.1
ADC Signal-Chain
8.3.7.1.1
Programmable Channel Gain and Digital Volume Control
8.3.7.1.2
Programmable Channel Gain Calibration
8.3.7.1.3
Programmable Channel Phase Calibration
8.3.7.1.4
Programmable Digital High-Pass Filter
8.3.7.1.5
Programmable Digital Biquad Filters
8.3.7.1.6
Programmable Channel Summer and Digital Mixer
8.3.7.1.7
Configurable Digital Decimation Filters
8.3.7.1.7.1
Linear Phase Filters
8.3.7.1.7.1.1
Sampling Rate: 16 kHz or 14.7 kHz
8.3.7.1.7.1.2
Sampling Rate: 24 kHz or 22.05 kHz
8.3.7.1.7.1.3
Sampling Rate: 32 kHz or 29.4 kHz
8.3.7.1.7.1.4
Sampling Rate: 48 kHz or 44.1 kHz
8.3.7.1.7.1.5
Sampling Rate: 96 kHz or 88.2 kHz
8.3.8
Interrupts, Status, and Digital I/O Pin Multiplexing
8.3.9
Programmable Channel Phase Calibration
8.4
Device Functional Modes
8.5
Register Maps
8.5.1
VEGA Registers
8.5.2
TAA5212 Registers
8.5.3
TAA5212 Registers
8.6
Feature Description
8.7
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Application
9.2.2
Design Requirements
9.2.3
Detailed Design Procedure
9.2.4
Application Performance Plots
9.2.5
What to Do and What Not to Do
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
13.1
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
RGE|24
MPQF124G
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slasf30_oa
6
Specifications