SLASF29A
January 2022 – October 2024
TAA5242
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements: TDM, I2S or LJ Interface
5.7
Switching Characteristics: TDM, I2S or LJ Interface
5.8
Timing Diagrams
5.9
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Hardware Control
6.3.2
Audio Serial Interfaces
6.3.2.1
Time Division Multiplexed Audio (TDM) Interface
6.3.2.2
Inter IC Sound (I2S) Interface
6.3.2.3
Left-Justified (LJ) Interface
6.3.3
Phase-Locked Loop (PLL) and Clock Generation
6.3.4
Analog Input Configurations
6.3.5
Reference Voltage
6.3.6
Integrated Microphone Bias
6.3.7
Signal-Chain Processing
6.3.7.1
Configurable Digital Decimation Filters
6.3.7.1.1
Linear-phase filters
6.3.7.1.1.1
Sampling Rate: 8kHz or 7.35kHz
6.3.7.1.1.2
Sampling Rate: 16kHz or 14.7kHz
6.3.7.1.1.3
Sampling Rate: 24kHz or 22.05kHz
6.3.7.1.1.4
Sampling Rate: 32kHz or 29.4kHz
6.3.7.1.1.5
Sampling Rate: 48kHz or 44.1kHz
6.3.7.1.1.6
Sampling Rate: 96kHz or 88.2kHz
6.3.7.1.1.7
Sampling Rate: 192kHz or 176.4kHz
6.3.7.1.2
Low-latency Filters
6.3.7.1.2.1
Sampling Rate: 24kHz or 22.05kHz
6.3.7.1.2.2
Sampling Rate: 32kHz or 29.4kHz
6.3.7.1.2.3
Sampling Rate: 48kHz or 44.1kHz
6.3.7.1.2.4
Sampling Rate: 96kHz or 88.2kHz
6.3.7.1.2.5
Sampling Rate: 192kHz or 176.4kHz
6.3.7.2
Programmable Digital High-Pass Filter
6.4
Device Functional Modes
6.4.1
Active Mode
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Application
7.2.2
Design Requirements
7.2.3
Detailed Design Procedure
7.2.4
Application Performance Plots
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGE|24
MPQF124G
Thermal pad, mechanical data (Package|Pins)
RGE|24
QFND808
Orderable Information
slasf29a_oa
slasf29a_pm
1
Features
Stereo high performance audio ADC
Performance:
Line/Microphone differential input dynamic range:
119
dB
Differential input THD+N: –98dB
Input voltage:
Differential, 2V
RMS
full-scale inputs
Single-ended, 1V
RMS
full-scale inputs
Sample rate (f
S
) = 8kHz to 192kHz
Key Features
Pin or Hardware Control
Audio Serial Interface
Format: TDM, I
2
S or Left Justified (LJ)
Bus Controller and Target Modes
Daisy chain in TDM Mode
Word Length: Selectable 24 or 32 Bits
Digital HPF with selectable cut-off frequency:
1Hz or 12Hz, at 48kHz sampling rate
Pin-selectable digital decimation filter options:
Linear-phase
Low-latency
Integrated PLL and Microphone Bias
Auto clock detection
Auto sample rate detection
Interrupt output on clock error
Single Supply Operation AVDD: 1.8V or 3.3V
I/O Supply Operation: 1.8V or 3.3V
Temperature grade 1: –40°C ≤ T
A
≤ +125°C