SLASF28A December 2023 – November 2024 TAC5142
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ADC PERFORMANCE FOR INPUT RECORDING | |||||||
Differential input full-scale AC signal voltage | AC-coupled input | 2 | VRMS | ||||
Single-ended input full-scale AC signal voltage | AC-coupled input | 1 | VRMS | ||||
SNR | Signal-to-noise ratio, A-weighted(1)(2) | INxx differential AC-coupled input and AC signal shorted to ground | 104 | dB | |||
INxx differential DC-coupled input and AC signal shorted to ground, in High Common Mode Tolerance Mode (MD5-MD4 = 2'b01) | 101 | ||||||
SNR | Signal-to-noise ratio, A-weighted(1)(2) | INxx differential AC-coupled input and AC signal shorted to ground, AVDD = 1.8V | 99 | dB | |||
INxx differential DC-coupled input and AC signal shorted to ground, in High Common Mode Tolerance Mode (MD5-MD4 = 2'b01), AVDD = 1.8V | 95 | ||||||
SNR | Signal-to-noise ratio, A-weighted(1)(2) | INxx single-ended AC-coupled input and AC signal shorted to ground | 97 | dB | |||
INxx single-ended AC-coupled input and AC signal shorted to ground, AVDD = 1.8V | 92 | ||||||
DR | Dynamic range, A-weighted(2) | INxx differential AC-coupled input and –60dBFS AC signal input | 103 | dB | |||
INxx differential DC-coupled input and –60dBFS dB AC signal input, in High Common Mode Tolerance Mode (MD5-MD4 = 2'b01) | 101 | ||||||
DR | Dynamic range, A-weighted(2) | INxx differential AC-coupled input and –60dBFS AC signal input, AVDD = 1.8V | 98 | dB | |||
INxx differential DC-coupled input and –60dBFS dB AC signal input, in High Common Mode Tolerance Mode (MD5-MD4 = 2'b01), AVDD = 1.8V | 95 | ||||||
DR | Dynamic range, A-weighted(2) | INxx single-ended AC-coupled input and –60dBFS AC signal input | 97 | dB | |||
INxx single-ended AC-coupled input and –60dBFS AC signal input, AVDD = 1.8V | 91 | ||||||
THD+N | Total harmonic distortion(2) | INxx differential AC-coupled input and –1dBFS AC signal input | –91 | dB | |||
INxx differential DC-coupled input and –1dBFS AC signal input, in High Common Mode Tolerance Mode (MD5-MD4 = 2'b01) | –90 | ||||||
ADC OTHER PARAMETERS | |||||||
AC Input impedance | Input pins INxP or INxM |
42 | kΩ | ||||
Output data word length | Pin Selectable, based on MD1/MD2 Configuration | 24 | 32 | Bits | |||
Digital high-pass filter cutoff frequency | First-order IIR filter, –3dB point (Pin Selectable) |
1 | 12 | Hz | |||
Interchannel isolation | –1dBFS AC signal line-in differential input to non-measurement channel |
–134 | dB | ||||
Interchannel gain mismatch | –6dBFS AC signal line-in differential input, 1kHz sinusoidal signal |
±0.1 | dB | ||||
Interchannel phase mismatch | –6dBFS AC signal line-in differential input, 1kHz sinusoidal signal |
±0.01 | Degrees | ||||
PSRR | Power-supply rejection ratio | 100mVPP, 1kHz sinusoidal signal on AVDD, differential input | 120 | dB | |||
MICROPHONE BIAS | |||||||
MICBIAS noise | Bandwidth = 20Hz to 20kHz, A-weighted, 1µF capacitor between MICBIAS and VSS (thermal pad) |
2 | µVRMS | ||||
MICBIAS voltage | AVDD = 1.8V | 1.375 | V | ||||
AVDD = 3.3V | 2.75 | ||||||
DAC Performance for Line Output/Head Phone Playback | |||||||
Full Scale Output Voltage | Differential output between OUTxP and OUTxM, AVDD = 3.3V | 2 | VRMS | ||||
Differential output between OUTxP and OUTxM, AVDD = 1.8V | 1 | ||||||
Single-ended output, AVDD = 3.3V | 1 | ||||||
Single-ended output, AVDD = 1.8V | 0.5 | ||||||
Pseudo-differential output between OUTxP and OUT1M with external common-mode sense, AVDD = 3.3V | 1 | ||||||
Pseudo-differential output between OUTxP and OUT1M with external common-mode sense, AVDD = 1.8V | 0.5 | ||||||
SNR | Signal-to-noise ratio, A-weighted(1)(2) | Differential output, 0dBFS signal, AVDD = 3.3V | 110 | dB | |||
Single-ended output, 0dBFS signal, AVDD = 3.3V | 107 | ||||||
Pseudo-differential output, 0dBFS signal, AVDD = 3.3V | 107 | ||||||
Differential output, 0dBFS signal, AVDD = 1.8V | 109 | ||||||
Single-ended output, 0dBFS signal, AVDD = 1.8V | 104 | ||||||
Pseudo-differential output, 0dBFS signal, AVDD = 1.8V | 103 | ||||||
DR | Dynamic range, A-weighted(2) | Differential output, –60dBFS signal, AVDD = 3.3V | 110 | dB | |||
Single-ended output, –60dBFS signal, AVDD = 3.3V | 107 | ||||||
Pseudo-differential output, –60dBFS signal, AVDD = 3.3V | 107 | ||||||
Differential output, –60dBFS signal, AVDD = 1.8V | 109 | ||||||
Single-ended output, –60dBFS signal, AVDD = 1.8V | 104 | ||||||
Pseudo-differential output, –60dBFS signal, AVDD = 1.8V | 103 | ||||||
THD+N | Total harmonic distortion(2) | Differential output, –1dBFS Signal, AVDD = 3.3V |
–100 | dB | |||
Single-ended output, –1dBFS Signal, AVDD = 3.3V |
–96 | ||||||
Headphone Load Range |
8 | 16 | 300 | Ω | |||
Headphone/Line-out Cap Load |
0 | 100 | 550 | pF | |||
Line-out Load Range |
600 | Ω | |||||
DAC Channel OTHER PARAMETERS | |||||||
Output Offset | 0 Input, Differential Line-output | ±0.5 | mV | ||||
Output Common Mode | Common Mode Level for OUTxP and OUTxM, AVDD = 1.8V | 0.9 | V | ||||
Common Mode Level for OUTxP and OUTxM, AVDD = 3.3V | 1.65 | ||||||
Common Mode Error | DC Error in Common Mode Voltage | ±10 | mV | ||||
Output Signal Bandwidth | 20 | kHz | |||||
Input data word length | Pin Selectable, based on MD1/MD2 Configuration | 24 | 32 | Bits | |||
Interchannel isolation | Differential output, –1dBFS input signal on non-measurement channel | –120 | dB | ||||
Gain Error | Differential output, –6dBFS Input signal | ±0.1 | |||||
Interchannel gain mismatch | Differential output, –6dBFS Input signal | ±0.1 | dB | ||||
Interchannel phase mismatch | Differential output, –6dBFS Input signal | ±0.01 | Degrees | ||||
PSRR | Power-supply rejection ratio | 100mVPP, 1kHz sinusoidal signal on AVDD, differential input, 0dB channel gain | 110 | dB | |||
Pout | Output Power Delivery | Receiver/Headphone RL=16Ω, THD+N<1% in Differential or Pseudo-differential mode | 62.5 | mW | |||
DIGITAL I/O | |||||||
VIL | Low-level digital input logic voltage threshold | All digital pins, IOVDD 1.8V operation | –0.3 | 0.35 x IOVDD | V | ||
All digital pins, IOVDD 3.3V operation | –0.3 | 0.8 | |||||
VIH | High-level digital input logic voltage threshold | All digital pins, IOVDD 1.8V operation | 0.65 x IOVDD | IOVDD + 0.3 | V | ||
All digital pins, IOVDD 3.3V operation | 2 | IOVDD + 0.3 | |||||
VOL | Low-level digital output voltage | All digital pins, IOL = –2 mA, IOVDD 1.8V operation | 0.45 | V | |||
All digital pins, IOL = –2 mA, IOVDD 3.3V operation | 0.4 | ||||||
VOH | High-level digital output voltage | All digital pins, IOH = 2 mA, IOVDD 1.8V operation | IOVDD – 0.45 | V | |||
All digital pins, IOH = 2 mA, IOVDD 3.3V operation | 2.4 | ||||||
IIL | Input logic-low leakage for digital inputs | All digital pins, input = 0V | –5 | 0.1 | 5 | µA | |
IIH | Input logic-high leakage for digital inputs | All digital pins, input = IOVDD | –5 | 0.1 | 5 | µA | |
CIN | Input capacitance for digital inputs | All digital pins | 5 | pF | |||
RPD | Pulldown resistance for digital I/O pins when asserted on | 20 | kΩ | ||||
TYPICAL SUPPLY CURRENT CONSUMPTION | |||||||
IAVDD | Current consumption in sleep mode or low power mode | All external clocks stopped, AVDD = 3.3V |
1.35 | mA | |||
IIOVDD | All external clocks stopped, IOVDD = 3.3V |
0.6 | µA | ||||
IIOVDD | All external clocks stopped, IOVDD = 1.8V |
0.2 | |||||
IAVDD | Current consumption with ADC 2-channel and DAC to Line-out 2-channel, operating at fS 16kHz, I2S Target Mode, BCLK = 64 × fS | AVDD = 3.3V | 22.7 | mA | |||
IIOVDD | IOVDD = 3.3V | 0.05 | |||||
IIOVDD | IOVDD = 1.8V | 0.02 | |||||
IAVDD | Current consumption with ADC 2-channel and DAC to Line-out 2-channel, operating at fS 48kHz, I2S Target Mode, BCLK = 64 × fS | AVDD = 3.3V | 26.6 | mA | |||
IIOVDD | IOVDD = 3.3V | 0.1 | |||||
IIOVDD | IOVDD = 1.8V | 0.05 | |||||
IAVDD | Current consumption with ADC 2-channel and DAC to Headphone 2-channel, operating at fS 16kHz, I2S Target Mode, BCLK = 64 × fS | AVDD = 3.3V | 21.5 | mA | |||
IIOVDD | IOVDD = 3.3V | 0.06 | |||||
IIOVDD | IOVDD = 1.8V | 0.03 | |||||
IAVDD | Current consumption with ADC 2-channel and DAC to Headphone 2-channel, operating at fS 48kHz, I2S Target Mode, BCLK = 64 × fS | AVDD = 3.3V | 25.5 | mA | |||
IIOVDD | IOVDD = 3.3V | 0.06 | |||||
IIOVDD | IOVDD = 1.8V | 0.03 |