SLASF36
January 2024
TAC5311-Q1
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Thermal Information
5.6
Electrical Characteristics
5.7
Timing Requirements: I2C Interface
5.8
Switching Characteristics: I2C Interface
5.9
Timing Requirements: TDM, I2S or LJ Interface
5.10
Switching Characteristics: TDM, I2S or LJ Interface
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Serial Interfaces
6.3.1.1
Control Serial Interfaces
6.3.1.2
Audio Serial Interfaces
6.3.1.2.1
Time Division Multiplexed Audio (TDM) Interface
6.3.1.2.2
Inter IC Sound (I2S) Interface
6.3.1.2.3
Left-Justified (LJ) Interface
6.3.2
Using Multiple Devices With Shared Buses
6.3.3
Phase-Locked Loop (PLL) and Clock Generation
6.3.4
Input Channel Configuration
6.3.5
Reference Voltage
6.3.6
Microphone Bias
6.3.7
Input DC Fault Diagnostics
6.3.7.1
Fault Conditions
6.3.7.1.1
Input Pin Short to Ground
6.3.7.1.2
Input Pin Short to MICBIAS
6.3.7.1.3
Open Inputs
6.3.7.1.4
Short Between INxP and INxM
6.3.7.1.5
Input Pin Overvoltage
6.3.7.1.6
Input Pin Short to VBAT_IN
6.3.7.2
Fault Reporting
6.3.7.2.1
Overcurrent and Overtemperature Protection
6.3.8
Signal-Chain Processing
6.3.8.1
ADC Signal-Chain
6.3.8.1.1
Programmable Channel Gain and Digital Volume Control
6.3.8.1.2
Programmable Channel Gain Calibration
6.3.8.1.3
Programmable Channel Phase Calibration
6.3.8.1.4
Programmable Digital High-Pass Filter
6.3.8.1.5
Programmable Digital Biquad Filters
6.3.8.1.6
Programmable Channel Summer and Digital Mixer
6.3.8.1.7
Configurable Digital Decimation Filters
6.3.8.1.7.1
Linear Phase Filters
6.3.8.1.7.1.1
Sampling Rate: 16kHz or 14.7kHz
6.3.8.1.7.1.2
Sampling Rate: 24kHz or 22.05kHz
6.3.8.1.7.1.3
Sampling Rate: 32kHz or 29.4kHz
6.3.8.1.7.1.4
Sampling Rate: 48kHz or 44.1kHz
6.3.8.1.7.1.5
Sampling Rate: 96kHz or 88.2kHz
6.3.8.1.7.1.6
Sampling Rate: 384kHz or 352.8kHz
6.3.9
DAC Signal-Chain
6.3.9.1
Programmable Channel Gain and Digital Volume Control
6.3.9.2
Programmable Channel Gain Calibration
6.3.9.3
Programmable Digital High-Pass Filter
6.3.9.4
Programmable Digital Biquad Filters
6.3.9.5
Programmable Digital Mixer
6.3.9.6
Configurable Digital Interpolation Filters
6.3.9.6.1
Linear Phase Filters
6.3.9.6.1.1
Sampling Rate: 16kHz or 14.7kHz
6.3.9.6.1.2
Sampling Rate: 24kHz or 22.05kHz
6.3.9.6.1.3
Sampling Rate: 32kHz or 29.4kHz
6.3.9.6.1.4
Sampling Rate: 48kHz or 44.1kHz
6.3.9.6.1.5
Sampling Rate: 96kHz or 88.2kHz
6.3.9.6.1.6
Sampling Rate: 384kHz or 352.8kHz
6.3.10
Interrupts, Status, and Digital I/O Pin Multiplexing
7
Register Maps
7.1
Page 0 Registers
7.2
Page 1 Registers
7.3
Page_3 Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Application
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
9
Power Supply Recommendations
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
12.1
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
RTV|32
MPQF166B
RGE|24
MPQF124G
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slasf36_oa
5
Specifications