SLASF32A December   2023  – October 2024 TAD5142

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements: TDM, I2S or LJ Interface
    7. 5.7 Switching Characteristics: TDM, I2S or LJ Interface
    8. 5.8 Timing Diagrams
    9. 5.9 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Hardware Control
      2. 6.3.2 Audio Serial Interfaces
        1. 6.3.2.1 Time Division Multiplexed Audio (TDM) Interface
        2. 6.3.2.2 Inter IC Sound (I2S) Interface
        3. 6.3.2.3 Left-Justified (LJ) Interface
      3. 6.3.3 Phase-Locked Loop (PLL) and Clock Generation
      4. 6.3.4 Analog Output Configurations
      5. 6.3.5 Reference Voltage
      6. 6.3.6 DAC Signal-Chain
        1. 6.3.6.1 Digital Interpolation Filters
          1. 6.3.6.1.1 Linear-phase filters
            1. 6.3.6.1.1.1 Sampling Rate: 8kHz or 7.35kHz
            2. 6.3.6.1.1.2 Sampling Rate: 16kHz or 14.7kHz
            3. 6.3.6.1.1.3 Sampling Rate: 24kHz or 22.05kHz
            4. 6.3.6.1.1.4 Sampling Rate: 32kHz or 29.4kHz
            5. 6.3.6.1.1.5 Sampling Rate: 48kHz or 44.1kHz
            6. 6.3.6.1.1.6 Sampling Rate: 96kHz or 88.2kHz
            7. 6.3.6.1.1.7 Sampling Rate: 192kHz or 176.4kHz
          2. 6.3.6.1.2 Low-latency Filters
            1. 6.3.6.1.2.1 Sampling Rate: 24kHz or 22.05kHz
            2. 6.3.6.1.2.2 Sampling Rate: 32kHz or 29.4kHz
            3. 6.3.6.1.2.3 Sampling Rate: 48kHz or 44.1kHz
            4. 6.3.6.1.2.4 Sampling Rate: 96kHz or 88.2kHz
            5. 6.3.6.1.2.5 Sampling Rate: 192kHz or 176.4kHz
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Application
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
      4. 7.2.4 Application Performance Plots
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

Figure 4-1 24-Pin QFN Package with Exposed Thermal Pad and Corner Pins, Top View
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
VSS A1 Ground Ground pin. Short directly to board ground plane.
DREG 1 Digital Supply Digital on-chip regulator output voltage for digital supply (1.55V, nominal)
BCLK 2 Digital I/O Audio serial data interface bus bit clock
FSYNC 3 Digital I/O Audio serial data interface bus frame synchronization signal
MD6 4 Digital I/O TDM mode: Daisy chain output
I2S/LJ mode: Mono/Stereo DAC Channels selection
DIN 5 Digital Input Audio serial data interface bus input
IOVDD 6 Digital Supply Digital I/O power supply (1.8V or 3.3V, nominal)
VSS A2 Ground Ground pin. Short directly to board ground plane.
MD1 7 Digital Input Controller mode: Frame rate and BCLK frequency selection
Target mode: AVDD supply, word length, and interpolation filter type selection
MD2 8 Digital Input Controller mode: Frame rate and BCLK frequency selection
Target mode: AVDD supply, word length, and interpolation filter type selection
MD3 9 Digital Input Controller mode: Controller clock input
Target mode: Short directly to board ground plane.
MD4 10 Digital Input DAC output configuration selection
GPO 11 Digital Output Interrupt output (latched)
MD5 12 Digital Input DAC output configuration selection
VSS A3 Ground Ground pin. Short directly to board ground plane.
MD0 13 Analog Input Multi-level analog input for controller/target mode and I2S/TDM/LJ mode selection
VSSA 14 Ground Short directly to board ground plane
VSSA 15 Ground Short directly to board ground plane
VSSA 16 Ground Short directly to board ground plane
VSSA 17 Ground Short directly to board ground plane
VSSA 18 Ground Short directly to board ground plane
VSS A4 Ground Ground pin. Short directly to board ground plane.
OUT1M 19 Analog Output Analog output 1M pin
OUT1P 20 Analog Output Analog output 1P pin
OUT2P 21 Analog Output Analog output 2P pin
OUT2M 22 Analog Output Analog output 2M pin
AVDD 23 Analog Supply Analog power supply (1.8V or 3.3V, nominal)
VREF 24 Analog Analog reference voltage filter output