SLOSE86B july 2022 – july 2023 TAS2781
PRODUCTION DATA
Brownout Prevention (BOP) feature provides a priority input to the limiter to generate a fast response to transient dips in supply voltage at end of charge conditions that can cause system level brownout. When supply voltage dips below the BOP threshold, the limiter begins reducing gain at a configurable attack rate. When supply voltage rises above the BOP threshold, the limiter will begin to release after the programmed hold time. The BOP feature can be enabled by setting the BOP_EN[0] register bit high. The brownout supply source can be set using BOP_SRC register bit to either PVDDH or PVDDL depending on application.
By default BOP supply source is set to PVDDL input and the SAR converter will digitize the PVDDH and PVDDL voltages and temperature. The PVDDH undervoltage detection will be disabled.
When BOP supply source is set to PVDDH input the SAR ADC converter willl digitize the PVDDH and PVDDL voltages and temperature. The PVDDH undervoltage detection will be enabled in this case.To reduce latency in the first attack of the BOP engine, PVDDL conversion can be bypassed by setting the register bit CNV_PVDDLto low.
When BOP supply source is set to PVDDL input the SAR converter willl digitize the PVDDH and PVDDL voltages and temperature. The PVDDH undervoltage detection will be disabled.
When the BOP is engaging the Supply Tracking Limiter is paused.
The BOP threshold is set by the BOP_TH[31:0] bits from registers in . The setting of BOP_MUTE bit determines if once the supply goes below the threshold the device mutes audio and shuts down or just attenuates the audio signal whit no muting.
The TAS2781 can also immediately mute and then shutdown the device when a BOP event occurs by reaching the threshold set by the BOPSD_TH[31:0] bits from registers in if the BOPSD_EN register bit is set high. This shutdown feature is auto disabled internally when BOP_MUTE is set high.
The BOP has programmable attack rate register bits BOP_ATK[2:0], attack step size register bits BOP_ATK_ST[1:0] and hold time register bits BOP_HLD[2:0]).
When the system comes out of BOP the supply tracking limiter release will be engaged. If the limiter is disabled the gain will be released as per limiter release settings.
The hold time can be set to Infinite by programming the BOP_INF_HLD register bit to high. The device will need to transition through a mute or SW/HW shutdown state or the register bit BOP_HLD_CLR can be set to high (which will cause the device to exit the hold state and begin releasing).
When BOP_INF_HLD bit is set low the device will hold based on programming of BOP_HLD[2:0] bits.