SLOSE86B july 2022 – july 2023 TAS2781
PRODUCTION DATA
The gain from audio input to speaker terminals is controlled by setting the amplifier output level and the digital volume control (DVC).
Amplifier output level settings are programmed using the AMP_LVL[4:0] register bits. The amplifier levels are presented in the register from . The Digital Volume Control (DVC) is set by default to 0 dB. It should be noted that these levels may not be achievable because of analog clipping in the amplifier, so they should be used only to convey gain.
Equation (1) calculates amplifier output voltage:
where
The DVC is configurable from 0 dB to -100 dB in 0.5 dB steps by setting the DVC_LVL[7:0] register bits. Settings greater than C8h are interpreted as mute. When a change in digital volume control occurs, the device ramps the volume to the new setting based on the DVC_SLEW[31:0] register bits status from . The bits DVC_RMP_RT[1:0] of register in enable or disable the volume ramp control
The Class-D amplifier uses a closed-loop architecture. The approximate threshold for output signal clipping is given by equation (2).
where:
When PVDDL supplies Class-D output stage typical RFET value is 0.5 Ω. For PVDDH supply RFET typical value is 0.25 Ω.