SLOS921B December   2015  – September 2018 TAS5411-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Block Diagram
      2.      Efficiency
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements for I2C Interface Signals
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Analog Audio Input and Preamplifier
      2. 9.3.2 Pulse-Width Modulator (PWM)
      3. 9.3.3 Gate Drive
      4. 9.3.4 Power FETs
      5. 9.3.5 Load Diagnostics
        1. 9.3.5.1 Load Diagnostics Sequence
        2. 9.3.5.2 Faults During Load Diagnostics
      6. 9.3.6 Protection and Monitoring
      7. 9.3.7 I2C Serial Communication Bus
        1. 9.3.7.1 I2C Bus Protocol
        2. 9.3.7.2 Random Write
        3. 9.3.7.3 Random Read
        4. 9.3.7.4 Sequential Read
    4. 9.4 Device Functional Modes
      1. 9.4.1 Hardware Control Pins
      2. 9.4.2 EMI Considerations
      3. 9.4.3 Operating Modes and Faults
    5. 9.5 Register Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Amplifier Output Filtering
        2. 10.2.1.2 Amplifier Output Snubbers
        3. 10.2.1.3 Bootstrap Capacitors
        4. 10.2.1.4 Analog Audio Input Filter
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Unused Pin Connections
          1. 10.2.2.1.1 MUTE Pin
          2. 10.2.2.1.2 STANDBY Pin
          3. 10.2.2.1.3 I2C Pins (SDA and SCL)
          4. 10.2.2.1.4 Terminating Unused Outputs
          5. 10.2.2.1.5 Using a Single-Ended Audio Input
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
      1. 12.2.1 Top Layer
      2. 12.2.2 Second Layer – Signal Layer
      3. 12.2.3 Third Layer – Power Layer
      4. 12.2.4 Bottom Layer – Ground Layer
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.1.4 Analog Audio Input Filter

The circuit requires an input capacitor to allow biasing of the amplifier put to the proper dc level. The input capacitor and the input impedance of the amplifier form a high-pass filter with a –3-dB corner frequency determined by the equation: f = 1 / (2πR(i)C(i)), where R(i) is the input impedance of the device based on the gain setting and C(i) is the input capacitor value. Table 10 lists largest recommended input capacitor values. Use a capacitor which matches the application need for the lowest frequency but does not exceed the values listed.

Table 10. Recommended Input AC-Coupling Capacitors

GAIN (dB) TYPICAL INPUT IMPEDANCE (kΩ) INPUT CAPACITANCE (µF) HIGH-PASS FILTER (Hz)
20 60 1 2.7
1.5 1.8
26 30 1 5.3
3.3 1.6
32 15 5.6 2.3
36 9 10 1.8