SLOS814D March   2014  – September 2016 TAS5421-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements for I2C Interface Signals
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Audio Input and Preamplifier
      2. 7.3.2 Pulse-Width Modulator (PWM)
      3. 7.3.3 Gate Drive
      4. 7.3.4 Power FETs
      5. 7.3.5 Load Diagnostics
      6. 7.3.6 Protection and Monitoring
      7. 7.3.7 I2C Serial Communication Bus
        1. 7.3.7.1 I2C Bus Protocol
        2. 7.3.7.2 Random Write
        3. 7.3.7.3 Random Read
        4. 7.3.7.4 Sequential Read
    4. 7.4 Device Functional Modes
      1. 7.4.1 Hardware Control Pins
      2. 7.4.2 EMI Considerations
      3. 7.4.3 Operating Modes and Faults
    5. 7.5 Register Maps
      1. 7.5.1 I2C Address Register Definitions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Amplifier Output Filtering
        2. 8.2.1.2 Amplifier Output Snubbers
        3. 8.2.1.3 Bootstrap Capacitors
        4. 8.2.1.4 Analog Audio Input Filter
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Unused Pin Connections
          1. 8.2.2.1.1 MUTE Pin
          2. 8.2.2.1.2 STANDBY Pin
          3. 8.2.2.1.3 I2C Pins (SDA and SCL)
          4. 8.2.2.1.4 Terminating Unused Outputs
          5. 8.2.2.1.5 Using a Single-Ended Audio Input
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
      1. 10.2.1 Top Layer
      2. 10.2.2 Second Layer - Signal Layer
      3. 10.2.3 Third Layer - Power Layer
      4. 10.2.4 Bottom Layer - Ground Layer
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resource
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The device is a mono high-efficiency class-D audio amplifier. Typical use of the device is to amplify an audio input to drive a speaker. The intent of its use is for a bridge-tied load (BTL) application, not for support of single-ended configuration. This section presents how to use the device in the application, including what external components are necessary and how to connect unused pins.

8.2 Typical Application

TAS5421-Q1 app-diag_SLOS814.gif Figure 17. TAS5421-Q1 Typical Application Schematic

8.2.1 Design Requirements

Use the following for the design requirements:

  • Power supplies

    • The device requires only a single power supply compliant with the recommended operation range. The device is designed to work with either a vehicle battery or regulated power supply such as from a backup battery.

  • Communication

    • The device communicates with the system controller with both discrete hardware control pins and with I2C. The device is an I2C slave and thus requires a master. If a master I2C-compliant device is not present in the system, the device can still be used, but only with the default settings. Diagnostic information is limited to the discrete reporting FAULT pin.

  • External components

    • Table 9 lists the components required for the device.

    Table 9. Supporting Components

    EVM DESIGNATOR QUANITY VALUE SIZE DESCRIPTION USE IN APPLICATION
    C7 1 10 μF ± 10% 1206 X7R ceramic capacitor, 25-V Power supply
    C8 1 330 μF ± 20% 10 mm Low-ESR aluminum capacitor, 25-V Power supply
    C9, C16, C20 3 1 μF ± 10% 0805 X7R ceramic capacitor, 25-V Analog audio input filter, bypass
    C10, C14 2 0.22 μF ± 10% 0603 X7R ceramic capacitor, 25-V Bootstrap capacitors
    C11, C17 2 3.3 μF ± 10% 0805 X7R ceramic capacitor, 25-V Amplifier output filtering
    C13, C15 2 470 pF ± 10% 0603 X7R ceramic capacitor, 250-V Amplifier output snubbers
    C6 1 0.1 μF ± 10% 0603 X7R ceramic capacitor, 25-V Power supply
    C2 1 2200 pF ± 10% 0603 X7R ceramic capacitor, 50-V Power supply
    C3 1 0.082 μF ± 10% 0603 X7R ceramic capacitor, 25-V Power supply
    C4, C5 2 4.7 μF ± 10% 1206 X7R ceramic capacitor, 25-V Power supply
    C12, C18 2 0.01 μF ± 10% 0603 X7R ceramic capacitor, 25-V Output EMI filtering
    L1 1 10 μH ± 20% 13.5 mm ×13.5 mm Shielded ferrite inductor Power supply
    L2 1 22 μH ± 20% 8 mm × 8 mm Coupled inductor Amplifier output filtering
    R5, R6 2 49.9 kΩ ± 1% 0805 Resistors, 0.125-W Analog audio input filter
    R4, R7 2 5.6 Ω ± 5% 0805 Resistors, 0.125-W Output snubbers

8.2.1.1 Amplifier Output Filtering

Output FETs drive the amplifier outputs in an H-bridge configuration. These transistors are either fully off or on. The result is a square-wave output signal with a duty cycle that is proportional to the amplitude of the audio signal. The amplifier outputs require a low-pass filter to filter out the PWM modulation carrier frequency. People frequently call this filter the L-C filter, due to the presence of an inductive element L and a capacitive element C to make up the 2-pole low-pass filter. The L-C filter attenuates the carrier frequency, reducing electromagnetic emissions and smoothing the current waveform which the load draws from the power supply. See Class-D LC Filter Design for a detailed description on proper component selection and design of an L-C filter based upon the desired load and response.

8.2.1.2 Amplifier Output Snubbers

A snubber is an RC network placed at the output of the amplifier to dampen ringing or overshoot on the PWM output waveform. Overshoot and ringing has several negative impacts including: potential EMI sources, degraded audio performance, and overvoltage stress of the output FETs or board components. For more information on the use and design of output snubbers, see Class-D Output Snubber Design Guide.

8.2.1.3 Bootstrap Capacitors

The output stage uses dual NMOS transistors; therefore, the circuit requires bootstrap capacitors for the high side of each output to turn on correctly. The required capacitor connection is from BSTN to OUTN and from BSTP to OUTP as shown in Figure 17.

8.2.1.4 Analog Audio Input Filter

The circuit requires an input capacitor to allow biasing of the amplifier put to the proper dc level. The input capacitor and the input impedance of the amplifier form a high-pass filter with a –3-dB corner frequency determined by the equation: f = 1 / (2πR(i)C(i)), where R(i) is the input impedance of the device based on the gain setting and C(i) is the input capacitor value. Table 10 lists largest recommended input capacitor values. Use a capacitor which matches the application requirement for the lowest frequency but does not exceed the values listed.

Table 10. Recommended Input AC-Coupling Capacitors

GAIN (dB) TYPICAL INPUT IMPEDANCE (kΩ) INPUT CAPACITANCE (µF) HIGH-PASS FILTER (Hz)
20 60 1 2.7
1.5 1.8
26 30 1 5.3
3.3 1.6
32 15 5.6 2.3
36 9 10 1.8

8.2.2 Detailed Design Procedure

Use the following steps for the design procedure:

  • Step 1: Hardware Schematic Design: Using the Figure 17 as a guide, integrate the hardware into the system schematic.
  • Step 2: Following the layout guidelines recommended in the Layout Guidelines section, integrate the device and its supporting components into the system PCB file.
  • Step 3: Thermal Design: The device has an exposed thermal pad which requires proper soldering. For more information, see Semiconductor and IC Package Thermal Metrics and PowerPAD Thermally Enhanced Package.
  • Step 4: Develop software: The EVM User's Guide has detailed instructions for how to set up the device, interpret diagnostic information, and so forth. For information about control registers, see the Register Maps section.

For questions and support, go to the E2E forums.

8.2.2.1 Unused Pin Connections

Even if unused, always connect pins to a fixed rail; do not leave them floating. Floating input pins represent an ESD risk, therefore the user must adhere to the following guidance for each pin.

8.2.2.1.1 MUTE Pin

If the MUTE pin is unused in the application, connect it to GND through a high-impedance resistor.

8.2.2.1.2 STANDBY Pin

If the STANDBY pin is unused in the application, connect it to a low-voltage rail such as 3.3 V or 5 V through a high-impedance resistor.

8.2.2.1.3 I2C Pins (SDA and SCL)

If there is no microcontroller in the system, use of the device without I2C communication is possible. In this situation, connect the SDA and SCL pins to 3.3 V.

8.2.2.1.4 Terminating Unused Outputs

If the FAULT pin does not report to a system microcontroller in the application, connect it to GND.

8.2.2.1.5 Using a Single-Ended Audio Input

When using a single-ended audio source, ac-ground the negative input through a capacitor equal in value to the input capacitor on the positive input, and apply the audio source to the positive input. For best performance, the ac ground should be at the audio source instead of at the device input if possible.

8.2.3 Application Curves

See the Typical Characteristics section for application performance plots.

Table 11. Table of Graphs

GRAPH FIGURE NO.
Efficiency vs Output Power Figure 3
THD+N vs Output Power Figure 4
Output Power vs PVDD Figure 5
THD+N vs Frequency Figure 6
Noise FFT With –60-dB Output Figure 7
Noise FFT With 1-W Output Figure 8
Overcurrent Threshold vs Temperature Figure 9