SLAS844A May 2012 – January 2016 TAS5624A
PRODUCTION DATA.
FR-4 Glass Epoxy material with 1-oz. (35-μm) is recommended for use with the TAS5624A. The use of this material can provide for higher power output, improved thermal performance, and better EMI margin (due to lower PCB trace inductance.
The large capacitors used in conjunction with each full-bridge, are referred to as the PVDD Capacitors. These capacitors must be selected for proper voltage margin and adequate capacitance to support the power requirements. In practice, with a well-designed system power supply, 1000-μF, 50-V capacitors support most applications. The PVDD capacitors must be low-ESR types because they are used in a circuit associated with high-speed switching.
To design an amplifier that has robust performance, passes regulatory requirements, and exhibits good audio performance, good-quality decoupling capacitors must be used. In practice, X5R or better must be used in this application.
The voltage of the decoupling capacitors must be selected in accordance with good design practices. Temperature, ripple current, and voltage overshoot must be considered. This fact is particularly true in the selection of the close decoupling capacitor that is placed on the power supply to each half-bridge. It must withstand the voltage overshoot of the PWM switching, the heat generated by the amplifier during high power output, and the ripple current created by high power output. A minimum voltage rating of 50 V is required for use with a 36-V power supply.
See the TAS5624A EVM User's Guide, (SLAU376) for more details including bill of materials.
These requirements must be followed to achieve best performance and reliability and minimum ground bounce at rated output power of TAS5624A.
A number of circuit components are critical to performance and reliability. They include LC filter inductors and capacitors, decoupling capacitors and the heat sink. The best detailed reference for these is the TAS5624A EVM BOM in the user's guide, which includes components that meet all the following requirements.
PCB layout, audio performance, EMC, and reliability are linked closely together, and solid grounding improves results in all these areas. The circuit produces high, fast-switching currents, and take care controlling current flow and minimizing voltage spikes and ground bounce at IC ground pins. Critical components must be placed for best performance and PCB traces must be sized for the high audio currents that the IC circuit produces.
Grounding: ground planes must be used to provide the lowest impedance and inductance for power and audio signal currents between the IC and its decoupling capacitors, LC filters and power supply connection. The area directly under the IC must be treated as central ground area for the device, and all IC grounds must be connected directly to that area. A matrix of vias must be used to connect that area to the ground plane. Ground planes can be interrupted by radial traces (traces pointing away from the IC), but they must never be interrupted by circular traces, which disconnect copper outside the circular trace from copper between it and the IC. Top and bottom areas that do not contain any power or signal traces must be flooded and connected with vias to the ground plane.
Decoupling capacitors: high-frequency decoupling capacitors must be located within 2 mm of the IC and connected directly to PVDD and GND pins with solid traces. Vias must not be used to complete these connections, but several vias must be used at each capacitor location to connect top ground directly to the ground plane. Placement of bulk decoupling capacitors is less critical, but they still must be placed as close as possible to the IC with strong ground return paths. Typically the heat sink sets the distance.
LC filters: LC filters must be placed as close as possible to the IC after the decoupling capacitors. The capacitors must have strong ground returns to the IC through top and bottom grounds for effective operation.
PCB copper must be at least 1-oz. thickness. PVDD and output traces must be wide enough to carry expected average currents without excessive temperature rise. PWM input traces must be kept short and close together on the input side of the IC and must be shielded with ground flood to avoid interference from high power switching signals.
The heat sink must be grounded well to the PCB near the IC, and a thin layer of highly conductive thermal compound (about 1 mill) must be used to connect the heat sink to the PowerPAD.