SLAS844A May 2012 – January 2016 TAS5624A
PRODUCTION DATA.
PIN | TYPE(1) | DESCRIPTION(2) | |
---|---|---|---|
NAME | NO. | ||
AVDD | 13 | P | Internal voltage regulator, analog section |
BST_A | 44 | P | Bootstrap pin, A-side |
BST_B | 43 | P | Bootstrap pin, B-side |
BST_C | 24 | P | Bootstrap pin, C-side |
BST_D | 23 | P | Bootstrap pin, D-side |
C_START | 7 | O | Start-up ramp |
CLIP | 18 | O | Clipping warning; open-drain; active-low |
DVDD | 8 | P | Internal voltage regulator, digital section |
FAULT | 16 | O | Shutdown signal, open-drain; active-low |
GND | 9, 10, 11, 12, 25, 26, 33, 34, 41, 42 |
P | Ground |
GVDD_AB | 1 | P | Gate-drive voltage supply; AB-side |
GVDD_CD | 22 | P | Gate-drive voltage supply; CD-side |
INPUT_A | 5 | I | PWM Input signal for half-bridge A |
INPUT_B | 6 | I | PWM Input signal for half-bridge B |
INPUT_C | 14 | I | PWM Input signal for half-bridge C |
INPUT_D | 15 | I | PWM Input signal for half-bridge D |
M1 | 19 | I | Mode selection 1 (LSB) |
M2 | 20 | I | Mode selection 2 |
M3 | 21 | I | Mode selection 3 (MSB) |
OC_ADJ | 3 | O | Overcurrent threshold programming pin |
OTW | 17 | O | Overtemperature warning; open-drain; active-low |
OUT_A | 39, 40 | O | Output, half-bridge A |
OUT_B | 35 | O | Output, half-bridge B |
OUT_C | 32 | O | Output, half-bridge C |
OUT_D | 27, 28 | O | Output, half-bridge D |
PowerPAD™ | — | P | Ground, connect to grounded heat sink |
PVDD_AB | 36, 37, 38 | P | PVDD supply for half-bridge A and B |
PVDD_CD | 29, 30, 31 | P | PVDD supply for half-bridge C and D |
RESET | 4 | I | Device reset Input; active-low |
VDD | 2 | P | Input power supply |
MODE PINS | PWM Input(1) | OUTPUT CONFIGURATION | INPUT A | INPUT B | INPUT C | INPUT D | MODE | ||
---|---|---|---|---|---|---|---|---|---|
M3 | M2 | M1 | |||||||
0 | 0 | 0 | 2N + 1 | 2 × BTL | PWMa | PWMb | PWMc | PWMd | AD Mode |
0 | 0 | 1 | 1N + 1(2) | 2 × BTL | PWMa | Unused | PWMc | Unused | AD Mode |
0 | 1 | 0 | 2N + 1 | 2 × BTL | PWMa | PWMb | PWMc | PWMd | BD Mode |
0 | 1 | 1 | 1N + 1(2) | 1 × BTL + 2 × SE | PWMa | Unused | PWMc | PWMd | AD Mode |
1 | 0 | 0 | 2N + 1 | 1 × PBTL | PWMa | PWMb | 0 | 0 | AD Mode |
1 | 0 | 0 | 1N + 1(2) | 1 × PBTL | PWMa | Unused | 0 | 1 | AD Mode |
1 | 0 | 0 | 2N + 1 | 1 × PBTL | PWMa | PWMb | 1 | 0 | BD Mode |
1 | 0 | 1 | 1N + 1 | 4 × SE(3) | PWMa | PWMb | PWMc | PWMd | AD Mode |