The TAS5760LD is a stereo I2S input device which includes hardware and software (I²C) control modes, integrated digital clipper, several gain options, and a wide power supply operating range to enable use in a multitude of applications. The TAS5760LD operates with a nominal supply voltage from 4.5 to 15 VDC. The device has an integrated DirectPath™ headphone amplifier and line driver to increase system level integration and reduce total solution costs.
An optimal mix of thermal performance and device cost is provided in the 120-mΩ RDS(ON) of the output MOSFETs. Additionally, a thermally enhanced 48-Pin TSSOP provides excellent operation in the elevated ambient temperatures found in modern consumer electronic devices.
The entire TAS5760xx family is pin-to-pin compatible in the 48-Pin TSSOP package. Alternatively, to achieve the smallest possible solutions size for applications where pin-to-pin compatibility and a headphone or line driver are not required, a 32-Pin TSSOP package is offered for the TAS5760M and TAS5760L devices. The I2C register map in all of the TAS5760xx devices are identical, to ensure low development overhead when choosing between devices based upon system-level requirements.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TAS5760LD | HTSSOP (48) | 12.50 mm × 6.10 mm |
NOTE:
Thermal Limits were determined via the TAS5760xxEVMChanges from B Revision (May 2017) to C Revision
Changes from A Revision (July 2015) to B Revision
Changes from * Revision (July 2013) to A Revision
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | 4000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | 1500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
TA | Ambient Operating Temperature | –25 | 85 | °C | |
AVDD | AVDD Supply | 4.5 | 16.5 | V | |
PVDD | PVDD Supply | 4.5 | 16.5 | V | |
DRVDD, DVDD | DRVDD and DVDD Supply | 2.8 | 3.63 | V | |
VIH(DR) | Input Logic HIGH for DVDD and DRVDD Referenced Digital Inputs | DVDD | V | ||
VIL(DR) | Input Logic LOW for DVDD and DRVDD Referenced Digital Inputs | 0 | V | ||
RHP | Headphone Load | 16 | Ω | ||
RLD | Line Driver Load | 1 | Ω | ||
RSPK (BTL) | Minimum Speaker Load in BTL Mode | 4 | Ω | ||
RSPK (PBTL) | Minimum Speaker Load in PBTL Mode | 2 | Ω |
THERMAL METRIC(1) | TAS5760LD | UNIT | ||
---|---|---|---|---|
DCA [HTSSOP] | DCA [HTSSOP] | |||
48 PIN(2) | 48 PIN(3) | |||
θJA | Junction-to-ambient thermal resistance | 60.3 | 30.2 | °C/W |
θJC(top) | Junction-to-case (top) thermal resistance | 16 | 14.3 | °C/W |
θJB | Junction-to-board thermal resistance | 12 | 12.7 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.4 | 0.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 11.9 | 12.7 | °C/W |
θJC(bottom) | Junction-to-case (bottom) thermal resistance | 0.8 | 0.7 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
DSCLK | Allowable SCLK Duty Cycle | 45% | 50% | 55% | ||
tH_L | Time high and low, SCLK, LRCK, SDIN | 10 | ns | |||
tSU
tHLD |
Setup and Hold time. LRCK, SDIN input to SCLK edge | Input tRISE ≤ 1 ns, input tFALL ≤ 1 ns | 5 | ns | ||
Input tRISE ≤ 4 ns, input tFALL ≤ 4 ns | 8 | |||||
Input tRISE ≤ 8 ns, input tFALL ≤ 8 ns | 12 | |||||
tRISE | Rise-time SCLK, LRCK, SDIN inputs | 8 | ns | |||
tFALL | Fall-time SCLK, LRCK, SDIN inputs | 8 | ns | |||
fS | Supported Input Sample Rates | Sample rates above 48kHz supported by "double speed mode," which is activated through the I²C control port | 32 | 96 | kHz | |
fSCLK | Supported SCLK Frequencies | Values include: 32, 48, 64 | 32 | 64 | fS |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
OVERTHRES(PVDD) | PVDD Overvoltage Error Threshold | PVDD Rising | 18 | V | ||
OVEFTHRES(PVDD) | PVDD Overvoltage Error Threshold | PVDD Falling | 17.3 | V | ||
UVEFTHRES(PVDD) | PVDD Undervoltage Error (UVE) Threshold | PVDD Falling | 3.95 | V | ||
UVERTHRES(PVDD) | PVDD UVE Threshold (PVDD Rising) | PVDD Rising | 4.15 | V | ||
OTETHRES | Overtemperature Error (OTE) Threshold | 150 | °C | |||
OTEHYST | Overtemperature Error (OTE) Hysteresis | 15 | °C | |||
OCETHRES | Overcurrent Error (OCE) Threshold for each BTL Output | PVDD= 15V, TA = 25 °C | 7 | A | ||
DCETHRES | DC Error (DCE) Threshold | PVDD= 12V, TA = 25 °C | 2.6 | V | ||
TSPK_FAULT | Speaker Amplifier Fault Time Out period | DC Detect Error | 650 | ms | ||
OTE or OCP Fault | 1.3 | s | ||||
UVETHRES(DRVDD) | Undervoltage Error (UVE) Threshold for headphone and line driver amplifier | Sensed on DR_UVE pin | 1.25 | V | ||
ILIMIT(DR) | Current Sourcing Limit of the Headphone and line driver amplifier | 68 | mA |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
AV00 | Speaker Amplifier Gain with SPK_GAIN[1:0] Pins = 00 | Hardware Control Mode (Additional gain settings available in Software Control Mode)(1) | 25.2 | dBV | ||
AV01 | Speaker Amplifier Gain with SPK_GAIN[1:0] Pins = 01 | Hardware Control Mode (Additional gain settings available in Software Control Mode)(1) | 28.6 | dBV | ||
AV10 | Speaker Amplifier Gain with SPK_GAIN[1:0] Pins = 10 | Hardware Control Mode (Additional gain settings available in Software Control Mode)(1) | 31 | dBV | ||
AV11 | Speaker Amplifier Gain with SPK_GAIN[1:0] Pins = 11 | (This setting places the device in Software Control Mode) | (Set via I²C) | |||
|VOS|(SPK_AMP) | Speaker Amplifier DC Offset | BTL, Worst case over voltage, gain settings | 10 | mV | ||
PBTL, Worst case over voltage, gain settings | 15 | mV | ||||
fSPK_AMP(0) | Speaker Amplifier Switching Frequency when PWM_FREQ Pin = 0 | (Hardware Control Mode. Additional switching rates available in Software Control Mode.) | 16 | fS | ||
fSPK_AMP(1) | Speaker Amplifier Switching Frequency when PWM_FREQ Pin = 1 | (Hardware Control Mode. Additional switching rates available in Software Control Mode.) | 8 | fS | ||
RDS(ON) | On Resistance of Output MOSFET (both high-side and low-side) | PVDD = 15 V, TA = 25 °C, Die Only | 120 | mΩ | ||
PVDD= 15V, TA = 25 °C, Includes: Die, Bond Wires, Leadframe | 150 | mΩ | ||||
fC | –3-dB Corner Frequency of High-Pass Filter | fS = 44.1 kHz | 3.7 | Hz | ||
fS = 48 kHz | 4 | |||||
fS = 88.2 kHz | 7.4 | |||||
fS = 96 kHz | 8 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
ICN(SPK) | Idle Channel Noise | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, A-Weighted |
- | 66 | - | µVrms |
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, A-Weighted |
- | 75 | - | µVrms | ||
PO(SPK) | Maximum Instantaneous Output Power Per. Ch. | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 4Ω, THD+N = 0.1%, |
- | 14.2 | - | W |
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, THD+N = 0.1% |
- | 8 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 4Ω, THD+N = 0.1%, |
- | 21.9 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, THD+N = 0.1% |
- | 12.5 | - | W | ||
PO(SPK) | Maximum Continuous Output Power Per. Ch.(1) | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 4Ω, THD+N = 0.1%, |
- | 14 | - | W |
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, THD+N = 0.1% |
- | 8 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 4Ω, THD+N = 0.1%, |
- | 13.25 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, THD+N = 0.1% |
- | 12.5 | - | W | ||
SNR(SPK) | Signal to Noise Ratio (Referenced to THD+N = 1%) | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, A-Weighted, -60dBFS Input |
- | 99.7 | - | dB |
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, A-Weighted, -60dBFS Input |
- | 98.2 | - | dB | ||
THD+N(SPK) | Total Harmonic Distortion and Noise | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 4Ω, Po = 1 W |
- | 0.02% | - | |
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, Po = 1 W |
- | 0.03% | - | |||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 4Ω, Po = 1 W |
- | 0.03% | - | |||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, Po = 1 W |
- | 0.03% | - | |||
X-Talk(SPK) | Cross-talk (worst case between LtoR and RtoL coupling) | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, Input Signal 250 mVrms, 1kHz Sine |
- | -92 | - | dB |
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, Input Signal 250 mVrms, 1kHz Sine |
- | -93 | - | dB |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
ICN | Idle Channel Noise | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, A-Weighted |
- | 69 | - | µVrms |
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, A-Weighted |
- | 85 | - | µVrms | ||
PO(SPK) | Maximum Instantaneous Output Power | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 2Ω, THD+N = 0.1%, |
- | 28.6 | - | W |
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 4Ω, THD+N = 0.1%, |
- | 15.9 | - | W | ||
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, THD+N = 0.1% |
- | 8.4 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 2Ω, THD+N = 0.1%, |
- | 43.2 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 4Ω, THD+N = 0.1%, |
- | 25 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, THD+N = 0.1% |
- | 13.3 | - | W | ||
PO(SPK) | Maximum Continuous Output Power(1) | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 2Ω, THD+N = 0.1%, |
- | 30 | - | W |
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 4Ω, THD+N = 0.1%, |
- | 15.9 | - | W | ||
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, THD+N = 0.1% |
- | 8.4 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 2Ω, THD+N = 0.1%, |
- | 28.5 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 4Ω, THD+N = 0.1%, |
- | 25 | - | W | ||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, THD+N = 0.1% |
- | 13.3 | - | W | ||
SNR | Signal to Noise Ratio (Referenced to THD+N = 1%) | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, A-Weighted, -60dBFS Input |
- | 100.4 | - | dB |
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, A-Weighted, -60dBFS Input |
- | 99.5 | - | dB | ||
THD+N(SPK) | Total Harmonic Distortion and Noise | PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 2Ω, Po = 1 W |
- | 0.03% | - | |
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 4Ω, Po = 1 W |
- | 0.02% | - | |||
PVDD = 12 V, SPK_GAIN[1:0] Pins = 00, RSPK = 8Ω, Po = 1 W |
- | 0.02% | - | |||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 2Ω, Po = 1 W |
- | 0.03% | - | |||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 4Ω, Po = 1 W |
- | 0.02% | - | |||
PVDD = 15 V, SPK_GAIN[1:0] Pins = 01, RSPK = 8Ω, Po = 1 W |
- | 0.02% | - |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
Input to Output Attenuation when muted | 80 | dB | ||||
|VOS|(DR) | Output Offset Voltage of Headphone Amplifier and Line Driver | 0.5 | mV | |||
fCP | Charge Pump Switching Frequency | 200 | 300 | 400 | kHz | |
ICN(HP) | Idle Channel Noise | R(HP) = 32 Ω, A-Weighted | 13 | µVrms | ||
ICN(LD) | Idle Channel Noise | R(LD) = 3 kΩ, A-Weighted | 11 | µVrms | ||
Po(HP) | Headphone Amplifier Output Power | R(HP) = 16 Ω, THD+N = 1%, Outputs in Phase | 40 | mW | ||
PSRR(DR) | Power Supply Rejection Ratio of Headphone Amplifier and Line Driver | 80 | dB | |||
SNR(HP) | Signal to Noise Ratio | (Referenced to 25 mW Output Signal), R(HP) = 16 Ω, A-Weighted | 96 | dB | ||
SNR(LD) | Signal to Noise Ratio | (Referenced to 2 Vrms Output Signal), R(LD) = 3 kΩ, A-Weighted | 90 | 105 | dB | |
THD+N(HP) | Total Harmonic Distortion and Noise for the Headphone Amplifier | PO(HP) = 10 mW | 0.01% | |||
THD+N(LD) | Total Harmonic Distortion and Noise for the Line Driver | VO(LD) = 2 Vrms | 0.002% | |||
Vo(LD) | Line Driver Output Voltage | THD+N = 1%, R(LD) = 3kΩ, Outputs in Phase | 2 | 2.4 | Vrms | |
X-Talk(HP) | Cross-talk (worst case between LtoR and RtoL coupling) | PO(HP) = 20 mW | –90 | dB | ||
X-Talk(LD) | Cross-talk (worst case between LtoR and RtoL coupling) | Vo = 1 Vrms | –111 | dB | ||
ZO(DR) | Output Impedance when muted | DR_MUTE = LOW | 110 | mΩ | ||
IMUTE(DR) | Current drawn from DRVDD supply in mute | DR_MUTE = LOW | 12 | mA | ||
IDRVDD(HP) | Current drawn from DRVDD supply with headphone | DR_MUTE = HIGH, PO(HP) = 25 mW, Input = 1kHz | 60 | mA | ||
IDRVDD(LD) | Current drawn from DRVDD supply with line driver | DR_MUTE = HIGH, VO(LD) = 2 Vrms, Input = 1kHz | 12 | mA |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
CL(I²C) | Allowable Load Capacitance for Each I²C Line | 400 | pF | |||
fSCL | Support SCL frequency | No Wait States | 400 | kHz | ||
tbuf | Bus Free time between STOP and START conditions | 1.3 | µS | |||
tf(I²C) | Rise Time, SCL and SDA | 300 | ns | |||
th1(I²C) | Hold Time, SCL to SDA | 0 | ns | |||
th2(I²C) | Hold Time, START condition to SCL | 0.6 | µs | |||
tI²C(start) | I²C Startup Time | 12 | mS | |||
tr(I²C) | Rise Time, SCL and SDA | 300 | ns | |||
tsu1(I²C) | Setup Time, SDA to SCL | 100 | ns | |||
tsu2(I²C) | Setup Time, SCL to START condition | 0.6 | µS | |||
tsu3(I²C) | Setup Time, SCL to STOP condition | 0.6 | µS | |||
Tw(H) | Required Pulse Duration, SCL HIGH | 0.6 | µS | |||
Tw(L) | Required Pulse Duration, SCL LOW | 1.3 | µS |
VPVDD
[V] |
RSPK
[Ω] |
SPEAKER AMPLIFIER STATE | IPVDD+AVDD
[mA] |
IDVDD
[mA] |
PDISS
[W] |
|
---|---|---|---|---|---|---|
6 | 4 | fSPK_AMP = 384kHz | Idle | 23.48 | 3.73 | 0.15 |
8 | 23.44 | 3.72 | 0.15 | |||
4 | Mute | 23.53 | 3.72 | 0.15 | ||
8 | 23.46 | 3.72 | 0.15 | |||
4 | Sleep | 13.26 | 0.48 | 0.08 | ||
8 | 13.27 | 0.53 | 0.08 | |||
4 | Shutdown | 0.046 | 0.04 | 0 | ||
8 | 0.046 | 0.03 | 0 | |||
4 | fSPK_AMP = 768kHz | Idle | 30.94 | 3.71 | 0.2 | |
8 | 30.94 | 3.71 | 0.2 | |||
4 | Mute | 29.37 | 3.71 | 0.19 | ||
8 | 29.39 | 3.71 | 0.19 | |||
4 | Sleep | 13.24 | 0.5 | 0.08 | ||
8 | 13.23 | 0.52 | 0.08 | |||
4 | Shutdown | 0.046 | 0.03 | 0 | ||
8 | 0.046 | 0.03 | 0 | |||
4 | fSPK_AMP = 1152kHz | Idle | 39.39 | 3.7 | 0.25 | |
8 | 39.43 | 3.7 | 0.25 | |||
4 | Mute | 36.91 | 3.7 | 0.23 | ||
8 | 36.9 | 3.69 | 0.23 | |||
4 | Sleep | 13.17 | 0.53 | 0.08 | ||
8 | 13.13 | 0.45 | 0.08 | |||
4 | Shutdown | 0.046 | 0.03 | 0 | ||
8 | 0.046 | 0.03 | 0 | |||
12 | 4 | fSPK_AMP = 384kHz | Idle | 32.95 | 3.74 | 0.41 |
8 | 32.93 | 3.73 | 0.41 | |||
4 | Mute | 32.98 | 3.73 | 0.41 | ||
8 | 32.97 | 3.73 | 0.41 | |||
4 | Sleep | 12.71 | 0.47 | 0.15 | ||
8 | 12.75 | 0.5 | 0.15 | |||
4 | Shutdown | 0.053 | 0.04 | 0 | ||
8 | 0.053 | 0.04 | 0 | |||
4 | fSPK_AMP = 768kHz | Idle | 44.84 | 3.73 | 0.55 | |
8 | 44.82 | 3.73 | 0.55 | |||
4 | Mute | 42.71 | 3.72 | 0.52 | ||
8 | 42.66 | 3.72 | 0.52 | |||
4 | Sleep | 12.71 | 0.49 | 0.15 | ||
8 | 12.73 | 0.52 | 0.15 | |||
4 | Shutdown | 0.063 | 0.03 | 0 | ||
8 | 0.053 | 0.03 | 0 | |||
4 | fSPK_AMP = 1152kHz | Idle | 59.3 | 3.73 | 0.72 | |
8 | 59.3 | 3.73 | 0.72 | |||
4 | Mute | 55.74 | 3.72 | 0.68 | ||
8 | 55.74 | 3.72 | 0.68 | |||
4 | Sleep | 12.67 | 0.49 | 0.15 | ||
8 | 12.61 | 0.43 | 0.15 | |||
4 | Shutdown | 0.053 | 0.02 | 0 | ||
8 | 0.053 | 0.03 | 0 |
All parameters are measured according to the conditions described in Specifications.