SLASEH5D May 2018 – November 2020 TAS5805M
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
TAS5805M supports LRCLK(FS) rate on the fly change. For example, change LCRLK from 32kHz to 48kHz or 96kHz, Host processor needs to put the LRCLK(FS)/SCLK to Halt state at least 100us before changing to the new sample rate.