The TCA9539-Q1 has a standard bidirectional I²C interface that is controlled by a controller device in order to be configured or read the status of this device. Each target on the I²C bus has a specific device address to differentiate between other target devices that are on the same I²C bus. Many target devices require configuration upon startup to set the behavior of the device. This is typically done when the controller accesses internal register maps of the target, which have unique register addresses. A device can have one or multiple registers where data is stored, written, or read. For more information see Understanding the I²C Bus, SLVA704.

The physical I²C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines must be connected to V_CC through a pull-up resistor. The size of the pull-up resistor is determined by the amount of capacitance on the I²C lines. For further details, see I²C Pull-up Resistor Calculation, SLVA689. Data transfer may be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition. See Table 8-1.

Figure 8-3 and Figure 8-4 show the general procedure for a controller to access a target device:

1. If a controller wants to send data to a target:
   • Controller-transmitter sends a START condition and addresses the target-receiver.
   • Controller-transmitter sends data to target-receiver.
   • Controller-transmitter terminates the transfer with a STOP condition.
2. If a controller wants to receive or read data from a target:
   • Controller-receiver sends a START condition and addresses the target-transmitter.
   • Controller-receiver sends the requested register to read to target-transmitter.
   • Controller-receiver receives data from the target-transmitter.
   • Controller-receiver terminates the transfer with a STOP condition.

Figure 8-3 Definition of Start and Stop Conditions

Figure 8-4 Bit Transfer

Table 8-1 shows the interface definition.