SCPS200E July 2009 – April 2019 TCA9555
PRODUCTION DATA.
When an I/O is configured as an input, FETs Q1 and Q2 are off, creating a high-impedance input. The input voltage may be raised above VCC to a maximum of 5.5 V.
If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the Output Port register. In this case, there are low-impedance paths between the I/O pin and either VCC or GND. The external voltage applied to this I/O pin must not exceed the recommended levels for proper operation. Figure 23 shows the simplified schematic of P-Port I/Os.