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TCAL6408 8-Bit Translating I2C-Bus, SMBus I/O Expander With Interrupt Output, Reset, and Agile I/O Configuration Registers
SCPS277C
November 2022 – January 2025
TCAL6408
PRODUCTION DATA
CONTENTS
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TCAL6408 8-Bit Translating I2C-Bus, SMBus I/O Expander With Interrupt Output, Reset, and Agile I/O Configuration Registers
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
I2C Bus Timing Requirements
5.8
Switching Characteristics
5.9
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
Voltage Translation
7.3.2
I/O Port
7.3.3
Adjustable Output Drive Strength
7.3.4
Interrupt Output (INT)
7.3.5
Reset Input (RESET)
7.3.6
Software Reset Call
7.4
Device Functional Modes
7.4.1
Power-On Reset
7.5
Programming
7.5.1
I2C Interface
7.6
Register Maps
7.6.1
Device Address
7.6.2
Control Register and Command Byte
7.6.3
Register Descriptions
7.6.4
Bus Transactions
7.6.4.1
Writes
7.6.4.2
Reads
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Minimizing ICC When I/Os Control LEDs
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.3.1
Power-On Reset Requirements
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Receiving Notification of Documentation Updates
9.2
Support Resources
9.3
Trademarks
9.4
Electrostatic Discharge Caution
9.5
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
RSV|16
MPQF205G
DTU|16
MPQF672A
Thermal pad, mechanical data (Package|Pins)
RSV|16
QFND836
Orderable Information
scps277c_oa
scps277c_pm
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Data Sheet
TCAL6408
8
-Bit
Translating
I
2
C-Bus, SMBus I/O Expander With Interrupt Output, Reset, and Agile I/O Configuration Registers
1
Features
Operating power-supply voltage range of 1.08V to 3.6V
Allows bidirectional voltage-level translation and GPIO expansion between 1.2V, 1.8V, 2.5V, and 3.3V I
2
C bus and p-ports
Low standby current consumption of 1µA typical at 1.8V
1MHz fast mode plus I
2
C bus
Hardware address pin allows two devices on the same I
2
C, SMBus bus
Active-low reset input (
RESET
)
Open-drain active-low interrupt output (
INT
)
Input or output configuration register
Polarity inversion register
Configurable I/O drive strength register
Pull-up and pull-down resistor configuration register
Internal power-on reset
Noise filter on SCL or SDA inputs
Latched outputs with high-current drive maximum capability for directly driving LEDs
Latch-up performance exceeds 100mA per JESD 78, class II
ESD protection exceeds JESD 22
4000V Human-body model (A114-A)
1000V Charged-device model (C101)