SCPS277B November 2022 – November 2023 TCAL6408
PRODUCTION DATA
When an I/O is configured as an input, FETs Q1 and Q2 are off (see Figure 8-2), which creates a high-impedance input. The input voltage may be raised above the supply voltage to a maximum of 3.6V.
If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the output port register. In this case, there are low-impedance paths between the I/O pin and either supply or GND. The external voltage applied to this I/O pin should not exceed the recommended levels for proper operation.