The TCAL9538 is a general purpose I/O expander for the two-line bidirectional bus (I²C) is designed for 1.08-V to 3.6-V operation. It provides general-purpose remote I/O expansion for processors through I²C communication, an interface consisting of serial clock (SCL), and serial data (SDA) signals.

The TCAL9538 digital core consists of 8-bit data registers which allow the user to configure the I/O port characteristics. At power-up or after a software reset call, the I/Os are configured as inputs. However, the system controller can configure the I/Os as either inputs or outputs by writing to the Configuration registers. The data for each input or output is kept in the corresponding Input Port or Output Port register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system controller. Additionally, the TCAL9538 has Agile I/O functionality which is specifically targeted to enhance the I/O ports. The Agile I/O features and registers include programmable output drive strength, programmable pull-up and pull-down resistors, latchable inputs, maskable interrupts, interrupt status register, and programmable open-drain or push-pull outputs. These configuration registers improve the I/O by increasing flexibility and allowing the user to optimize their design for power consumption, speed, and EMI.

Other features of the device include an interrupt that is generated on the INT pin whenever an input port changes state. The device can be reset to its default state by issuing a software reset command or by cycling power to the device and causing a power-on reset. The hardware selectable address pins allow multiple TCAL9538 devices to be connected to the same I²C bus.

The TCAL9538 open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system controller that an input state has changed. The INT pin can be connected to the interrupt input of a processor. By sending an interrupt signal on this line, the device can inform the processor if there is incoming data on the remote I/O ports without having to communicate via the I²C bus. Thus, the device can remain a simple target device.

The system controller can re-initialize I²C/SMBus state machine in the event of a timeout or other improper operation by asserting a low on the RESET input pin without resetting the sticky registers to default values.

Two hardware pins (A0 and A1) can be used to program and vary the fixed I²C address, and allow multiple devices to share the same I²C bus or SMBus.