SCPS280A November   2022  – November 2023 TCAL9538

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 I2C Bus Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 I/O Port
      2. 7.3.2 Adjustable Output Drive Strength
      3. 7.3.3 Interrupt Output (INT)
      4. 7.3.4 Reset Input (RESET)
      5. 7.3.5 Software Reset Call
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
    6. 7.6 Register Maps
      1. 7.6.1 Device Address
      2. 7.6.2 Control Register and Command Byte
      3. 7.6.3 Register Descriptions
      4. 7.6.4 Bus Transactions
        1. 7.6.4.1 Writes
        2. 7.6.4.2 Reads
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Minimizing ICC When I/Os Control LEDs
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • DTU|16
  • RSV|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

GUID-2BF111DB-3FE7-42BB-8E07-5BD26D4702A4-low.gifFigure 4-1 PW (TSSOP) Package, 16-Pin
(Top View)
GUID-20211208-SS0I-WRLZ-QFG3-4QFNNTMMCCH5-low.svgFigure 4-3 DTU (X2QFN) Package, 16-Pin
(Top View)
GUID-20211208-SS0I-2Q9N-6FZC-KWXDNQ2HCWN3-low.svgFigure 4-2 RSV (UQFN) Package, 16-Pin
(Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME TSSOP
(PW)		 QFN
(RSV)		 X2QFN
(DTU)
A0 1 15 A2 I Address input. Connect directly to VCC or ground
A1 2 16 B2 I Address input. Connect directly to VCC or ground
GND 8 6 D2 – Ground
INT 13 11 B4 O Interrupt output. Connect to VCC through a pull-up resistor
P0 4 2 B1 I/O P-port input/output (push-pull design structure). At power on, P0 is configured as an input
P1 5 3 C2 I/O P-port input/output (push-pull design structure). At power on, P1 is configured as an input
P2 6 4 C1 I/O P-port input/output (push-pull design structure). At power on, P2 is configured as an input
P3 7 5 D1 I/O P-port input/output (push-pull design structure). At power on, P3 is configured as an input
P4 9 7 D3 I/O P-port input/output (push-pull design structure). At power on, P4 is configured as an input
P5 10 8 D4 I/O P-port input/output (push-pull design structure). At power on, P5 is configured as an input
P6 11 9 C4 I/O P-port input/output (push-pull design structure). At power on, P6 is configured as an input
P7 12 10 C3 I/O P-port input/output (push-pull design structure). At power on, P7 is configured as an input
RESET 3 1 A1 I Active-low reset input. Connect to VCC through a pull-up resistor, if no active connection is used
SCL 14 12 A4 I Serial clock bus. Connect to VCC through a pull-up resistor
SDA 15 13 B3 I/O Serial data bus. Connect to VCC through a pull-up resistor
VCC 16 14 A3 – Supply voltage
(1) I = Input, O = Output, I/O = Input or Output.