SLLSFD1E January   2021  – March 2023 TCAN1043A-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings - IEC Specifications
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Dissipation Ratings
    7. 6.7  Power Supply Characteristics
    8. 6.8  Electrical Characteristics
    9. 6.9  Timing Requirements
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Supply Pins
        1. 8.3.1.1 VSUP Pin
        2. 8.3.1.2 VCC Pin
        3. 8.3.1.3 VIO Pin
      2. 8.3.2 Digital Inputs and Outputs
        1. 8.3.2.1 TXD Pin
        2. 8.3.2.2 RXD Pin
        3. 8.3.2.3 nFAULT Pin
        4. 8.3.2.4 EN Pin
        5. 8.3.2.5 nSTB Pin
      3. 8.3.3 GND
      4. 8.3.4 INH Pin
      5. 8.3.5 WAKE Pin
      6. 8.3.6 CAN Bus Pins
      7. 8.3.7 Faults
        1. 8.3.7.1 Internal and External Fault Indicators
          1. 8.3.7.1.1 Power-Up (PWRON Flag)
          2. 8.3.7.1.2 Wake-Up Request (WAKERQ Flag)
          3. 8.3.7.1.3 Undervoltage Faults
            1. 8.3.7.1.3.1 Undervoltage on VSUP
            2. 8.3.7.1.3.2 Undervoltage on VCC
            3. 8.3.7.1.3.3 Undervoltage on VIO
          4. 8.3.7.1.4 CAN Bus Fault (CBF Flag)
          5. 8.3.7.1.5 TXD Clamped Low (TXDCLP Flag)
          6. 8.3.7.1.6 TXD Dominant State Timeout (TXDDTO Flag)
          7. 8.3.7.1.7 TXD Shorted to RXD Fault (TXDRXD Flag)
          8. 8.3.7.1.8 CAN Bus Dominant Fault (CANDOM Flag)
      8. 8.3.8 Local Faults
        1. 8.3.8.1 TXD Clamped Low (TXDCLP)
        2. 8.3.8.2 TXD Dominant Timeout (TXD DTO)
        3. 8.3.8.3 Thermal Shutdown (TSD)
        4. 8.3.8.4 Undervoltage Lockout (UVLO)
        5. 8.3.8.5 Unpowered Devices
        6. 8.3.8.6 Floating Terminals
        7. 8.3.8.7 CAN Bus Short-Circuit Current Limiting
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Mode Description
        1. 8.4.1.1 Normal Mode
        2. 8.4.1.2 Silent Mode
        3. 8.4.1.3 Standby Mode
        4. 8.4.1.4 Go-To-Sleep Mode
        5. 8.4.1.5 Sleep Mode
          1. 8.4.1.5.1 Remote Wake Request via Wake-Up Pattern (WUP)
          2. 8.4.1.5.2 Local Wake-Up (LWU) via WAKE Input Terminal
      2. 8.4.2 CAN Transceiver
        1. 8.4.2.1 CAN Transceiver Operation
          1. 8.4.2.1.1 CAN Transceiver Modes
            1. 8.4.2.1.1.1 CAN Off Mode
            2. 8.4.2.1.1.2 CAN Autonomous: Inactive and Active
            3. 8.4.2.1.1.3 CAN Active
          2. 8.4.2.1.2 Driver and Receiver Function Tables
          3. 8.4.2.1.3 CAN Bus States
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
      1. 9.1.1 Typical Application
      2. 9.1.2 Design Requirements
        1. 9.1.2.1 Bus Loading, Length and Number of Nodes
      3. 9.1.3 Detailed Design Procedure
        1. 9.1.3.1 CAN Termination
    2. 9.2 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.4 INH Pin

The INH pin is a high-voltage output. It can be used to control external regulators. These regulators are usually used to support the microprocessor and VIO pin. The INH function is on in all modes except for sleep mode. In sleep mode, the INH pin is turned off, going into a high-impedance state. This allows the node to be placed into the lowest power state while in sleep mode. A 100 kΩ load can be added to the INH output for a fast transition time from the driven high state to the low state and to force the pin low when left floating.

This terminal should be considered a high-voltage logic terminal, not a power output. The INH pin should be used to drive the EN terminal of the system’s power management device and should not be used as a switch for the power management supply itself. This terminal is not reverse-battery protected and thus should not be connected outside the system module.