SLLSFD1E January 2021 – March 2023 TCAN1043A-Q1
PRODUCTION DATA
The CAN bus has two logical states during operation: recessive and dominant. See Figure 8-11.
A dominant bus state occurs when the bus is driven differentially and corresponds to a logic low on the TXD and RXD pins. A recessive bus state occurs when the bus is biased to one half of the CAN transceiver supply voltage via the high resistance internal input resistors (RIN) of the receiver and corresponds to a logic high on the TXD and RXD pins.
A dominant state overwrites the recessive state during arbitration. Multiple CAN nodes may be transmitting a dominant bit at the same time during arbitration, and in this case the differential voltage of the CAN bus is greater than the differential voltage of a single CAN driver. The TCAN1043A-Q1 CAN transceiver implements low-power standby and sleep modes which enable a third bus state where, if the CAN bus is inactive for t > tSILENCE, the bus pins are biased to ground via the high-resistance internal resistors of the receiver.