SLLSFL8A July   2021  – December 2021 TCAN1046AV-Q1 , TCAN1048AV-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description Continued
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  ESD Ratings — IEC Specifications
    4. 8.4  Recommended Operating Conditions
    5. 8.5  Thermal Characteristics
    6. 8.6  Supply Characteristics
    7. 8.7  Dissipation Ratings
    8. 8.8  Electrical Characteristics
    9. 8.9  Switching Characteristics
    10. 8.10 Typical Characteristics
  9. Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Pin Description
        1. 10.3.1.1 TXD1 and TXD2
        2. 10.3.1.2 GND1 and GND2
        3. 10.3.1.3 VCC
        4. 10.3.1.4 RXD1 and RXD2
        5. 10.3.1.5 VIO
        6. 10.3.1.6 CANH and CANL
        7. 10.3.1.7 STB1, STB2, nSTB1, and nSTB2 (Standby)
      2. 10.3.2 CAN Bus States
      3. 10.3.3 TXD Dominant Timeout (DTO)
      4. 10.3.4 CAN Bus Short Circuit Current Limiting
      5. 10.3.5 Thermal Shutdown (TSD)
      6. 10.3.6 Undervoltage Lockout
      7. 10.3.7 Unpowered Device
      8. 10.3.8 Floating pins
    4. 10.4 Device Functional Modes
      1. 10.4.1 Operating Modes
      2. 10.4.2 Normal Mode
      3. 10.4.3 Standby Mode
        1. 10.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
      4. 10.4.4 Driver and Receiver Function
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 CAN Termination
      2. 11.2.2 Detailed Design Procedures
        1. 11.2.2.1 Bus Loading, Length and Number of Nodes
      3. 11.2.3 Application Curves
    3. 11.3 System Examples
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 Support Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

CAN Bus Short Circuit Current Limiting

The TCAN104xAV-Q1 has several protection features that limit the short circuit current when a CAN bus line is shorted. The features include CAN driver current limiting in the dominant and recessive states and TXD dominant state timeout which prevents permanently having the higher short-circuit current of a dominant state in case of a system fault. During CAN communication, the bus switches between the dominant and recessive states, thus the short-circuit current may be viewed as either the current during each bus state or as a DC average current. When selecting termination resistors or a common-mode choke for the CAN design the average power rating, IOS(AVG), should be used. The percentage dominant is limited by the TXD DTO and the CAN protocol which has forced state changes and recessive bits due to bit stuffing, control fields, and interframe space. These provides for a minimum amount of recessive time on the bus even if the data field contains a high percentage of dominant bits.

The average short-circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short-circuit currents. The average short-circuit current may be calculated using Equation 2.

Equation 2. IOS(AVG) = % Transmit x [(% REC_Bits x IOS(SS)_REC) + (% DOM_Bits x IOS(SS)_DOM)] + [% Receive x IOS(SS)_REC]

Where:

  • IOS(AVG) is the average short-circuit current
  • % Transmit is the percentage the node is transmitting CAN messages
  • % Receive is the percentage the node is receiving CAN messages
  • % REC_Bits is the percentage of recessive bits in the transmitted CAN messages
  • % DOM_Bits is the percentage of dominant bits in the transmitted CAN messages
  • IOS(SS)_REC is the recessive steady state short-circuit current
  • IOS(SS)_DOM is the dominant steady state short- circuit current

The short-circuit current and the possible fault cases of the network should be considered when sizing the power supply used to generate the transceivers VCC supply.