SLLSFL8A July   2021  – December 2021 TCAN1046AV-Q1 , TCAN1048AV-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description Continued
  6. 6 Device Comparison
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  ESD Ratings — IEC Specifications
    4. 8.4  Recommended Operating Conditions
    5. 8.5  Thermal Characteristics
    6. 8.6  Supply Characteristics
    7. 8.7  Dissipation Ratings
    8. 8.8  Electrical Characteristics
    9. 8.9  Switching Characteristics
    10. 8.10 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Pin Description
        1. 10.3.1.1 TXD1 and TXD2
        2. 10.3.1.2 GND1 and GND2
        3. 10.3.1.3 VCC
        4. 10.3.1.4 RXD1 and RXD2
        5. 10.3.1.5 VIO
        6. 10.3.1.6 CANH and CANL
        7. 10.3.1.7 STB1, STB2, nSTB1, and nSTB2 (Standby)
      2. 10.3.2 CAN Bus States
      3. 10.3.3 TXD Dominant Timeout (DTO)
      4. 10.3.4 CAN Bus Short Circuit Current Limiting
      5. 10.3.5 Thermal Shutdown (TSD)
      6. 10.3.6 Undervoltage Lockout
      7. 10.3.7 Unpowered Device
      8. 10.3.8 Floating pins
    4. 10.4 Device Functional Modes
      1. 10.4.1 Operating Modes
      2. 10.4.2 Normal Mode
      3. 10.4.3 Standby Mode
        1. 10.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
      4. 10.4.4 Driver and Receiver Function
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 CAN Termination
      2. 11.2.2 Detailed Design Procedures
        1. 11.2.2.1 Bus Loading, Length and Number of Nodes
      3. 11.2.3 Application Curves
    3. 11.3 System Examples
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 Support Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

13.1 Layout Guidelines

  • Place the protection and filtering circuitry close to the bus connector, J1, to prevent transients, ESD, and noise from propagating onto the board. This layout example shows optional transient voltage suppression (TVS) diodes, D1 and D2, which may be implemented if the system-level requirements exceed the specified rating of the transceiver. This example also shows optional bus filter capacitors C6, C8, C9 and C11.
  • Design the bus protection components in the direction of the signal path. Do not force the transient current to divert from the signal path to reach the protection device.
  • Decoupling capacitors should be placed as close as possible to the supply pins VCC and VIO of transceiver.
  • Use at least two vias for supply and ground connections of bypass capacitors and protection devices to minimize trace and via inductance.
    Note:

    High frequency current follows the path of least impedance and not the path of least resistance.

  • This layout example shows how split termination could be implemented on the CAN node. The termination is split into two resistors, R8 and R9 for channel 1, R10 and R11 for channel 2 with the center or split tap of the termination connected to ground via capacitor C7 or C10. Split termination provides common-mode filtering for the bus. See CAN Termination, CAN Bus Short Circuit Current Limiting, and Equation 2 for information on termination concepts and power ratings needed for the termination resistor(s).