SLLSFQ6A December   2022  – June 2024 TCAN3403-Q1 , TCAN3404-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings, IEC Transients
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Characteristics
    6. 6.6  Supply Characteristics
    7. 6.7  Dissipation Ratings
    8. 6.8  Electrical Characteristics
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Description
        1. 8.3.1.1 TXD
        2. 8.3.1.2 GND
        3. 8.3.1.3 VCC
        4. 8.3.1.4 RXD
        5. 8.3.1.5 VIO (TCAN3403-Q1 only)
        6. 8.3.1.6 CANH and CANL
        7. 8.3.1.7 STB (Standby)
        8. 8.3.1.8 SHDN (Shutdown)
      2. 8.3.2 CAN Bus States
      3. 8.3.3 TXD Dominant Timeout (DTO)
      4. 8.3.4 CAN Bus short-circuit current limiting
      5. 8.3.5 Thermal Shutdown (TSD)
      6. 8.3.6 Undervoltage Lockout
      7. 8.3.7 Unpowered Device
      8. 8.3.8 Floating pins
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operating Modes
      2. 8.4.2 Normal Mode
      3. 8.4.3 Standby Mode
        1. 8.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
      4. 8.4.4 Shutdown Mode
      5. 8.4.5 Driver and Receiver Function
  10. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 CAN Termination
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 ISO 11898-2 Compatibility of TCAN340x-Q1 Family of 3.3V CAN Transceivers
        1. 9.3.1.1 Introduction
        2. 9.3.1.2 Differential Signal
        3. 9.3.1.3 Common-Mode Signal
        4. 9.3.1.4 Interoperability of 3.3V CAN in 5V CAN Systems
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.2 CAN Bus States

The CAN bus has two logical states during operation: recessive and dominant. See Figure 8-2 and Figure 8-3.

A dominant bus state occurs when the bus is driven differentially and corresponds to a logic low on the TXD and RXD pins. A recessive bus state occurs when the bus is biased to roughly VCC/2 via the high-resistance internal input resistors (RIN) of the receiver and corresponds to a logic high on the TXD and RXD pins.

A dominant state overwrites the recessive state during arbitration. Multiple CAN nodes may be transmitting a dominant bit at the same time during arbitration, and in this case the differential voltage of the bus is greater than the differential voltage of a single driver.

The TCANC340x-Q1 transceivers implement a low-power standby (STB) mode which enables a third bus state where the bus pins are weakly biased to ground via the high resistance internal resistors of the receiver. See Figure 8-2 and Figure 8-3.

TCAN3404-Q1 TCAN3403-Q1 Bus States Figure 8-2 Bus States
TCAN3404-Q1 TCAN3403-Q1 Simplified Recessive Common Mode Bias Unit and Receiver
A - Normal Mode B - Standby Mode
Figure 8-3 Simplified Recessive Common Mode Bias Unit and Receiver