SLLSF91A December 2018 – January 2020 TCAN4550
PRODUCTION DATA.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
CR31 | CR30 | CR29 | CR28 | CR27 | CR26 | CR25 | CR24 |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
CR23 | CR22 | CR21 | CR20 | CR19 | CR18 | CR17 | CR16 |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
CR15 | CR14 | CR13 | CR12 | CR11 | CR10 | CR9 | CR8 |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CR7 | CR6 | CR5 | CR4 | CR3 | CR2 | CR1 | CR0 |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31:0 | CR31 to CR0 | R/W | 0 | Cancellation Request
Each Tx Buffer has its own Cancellation Request bit. Writing a ‘1’ will set the corresponding Cancellation Request bit; writing a ‘0’ has no impact. This enables the Host to set cancellation requests for multiple Tx Buffers with one write to TXBCR. TXBCR bits are set only for those Tx Buffers configured via TXBC. The bits remain set until the corresponding bit of TXBRP is reset. 0 - No cancellation pending 1 - Cancellation pending |