SLLSFX3A October   2024  – October 2024 TCAN844-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  ESD Ratings, IEC Specification
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Characteristics
    6. 5.6  Power Supply Characteristics
    7. 5.7  Dissipation Ratings
    8. 5.8  Electrical Characteristics
    9. 5.9  Switching Characteristics
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pin Description
        1. 7.3.1.1 TXD
        2. 7.3.1.2 GND
        3. 7.3.1.3 VCC
        4. 7.3.1.4 RXD
        5. 7.3.1.5 VIO
        6. 7.3.1.6 CANH and CANL
        7. 7.3.1.7 STB (Standby)
      2. 7.3.2 CAN Bus States
      3. 7.3.3 TXD Dominant Timeout (DTO)
      4. 7.3.4 CAN Bus Short-Circuit Current Limiting
      5. 7.3.5 Thermal Shutdown (TSD)
      6. 7.3.6 Undervoltage Lockout
      7. 7.3.7 Unpowered Device
      8. 7.3.8 Floating pins
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Modes
      2. 7.4.2 Normal Mode
      3. 7.4.3 Standby Mode
        1. 7.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
      4. 7.4.4 Driver and Receiver Function
  9. 8 Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 CAN Termination
      2. 8.2.2 Detailed Design Procedures
        1. 8.2.2.1 Bus Loading, Length and Number of Nodes
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Electrical Characteristics

Over recommended operating conditions with TJ = -40℃ to 150℃ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver Electrical Characteristics
VCANH(D) Bus output voltage (dominant) CANH VTXD = 0V, RL =50Ω to 65Ω, CL = open, RCM = open 2.75 4.5 V
VCANL(D) Bus output voltage (dominant) CANL VTXD = 0V, RL =50Ω to 65Ω, CL = open, RCM = open 0.5 2.25 V
VCANH(R)
VCANL(R)		 Bus output voltage (recessive) VTXD = VCC, RL = open (no load), RCM = open 2 3 V
VSYM Driver symmetry
(VO(CANH) + VO(CANL))/VCC		 RTERM = 60Ω, CL = open, CSPLIT = 4.7 nF 0.9 1.1 V/V
VSYM_DC DC output symmetry
(VCC - VO(CANH) - VO(CANL))		 RL = 60Ω, CL = open –400 400 mV
VDIFF(D) Differential output voltage normal mode
Dominant		 TXD = 0V, 50Ω ≤ RL ≤ 65Ω, CL = open 1.5 3 V
TXD = 0V, 45Ω ≤ RL ≤ 70Ω, CL = open 1.4 3.3 V
TXD = 0V, RL = 2240Ω, CL = open 1.5 5 V
VDIFF(R) Differential output voltage normal mode
Recessive		 TXD = VCC or VIO, RL = 60Ω, CL = open –120 12 mV
Normal mode, TXD = VCC or VIO, RL = open, CL = open –50 50 mV
VCANH(INACT) Bus output voltage on CANH with bus biasing inactive VTXD = VCC or VIO, RL = open, CL = open, RCM = open –0.1 0.1 V
VCANL(INACT) Bus output voltage on CANL with bus biasing inactive VTXD = VCC or VIO, RL = open, CL = open, RCM = open –0.1 0.1 V
VDIFF(INACT) Bus output voltage on CANH - CANL (recessive) with bus biasing inactive VTXD = VCC or VIO, RL = open, CL = open, RCM = open –0.2 0.2 V
ICANH(OS) Short-circuit steady-state output current, Dominant  –3.0V ≤ VCANH ≤ +18.0V, CANL = open, VTXD = 0V –115 mA
ICANL(OS)  –3.0V ≤ VCANL ≤ +18.0V, CANH = open, VTXD = 0V 115 mA
IOS_REC Short-circuit steady-state output current; Recessive  –40V ≤ VBUS ≤ +40V, VBUS = CANH = CANL –5 5 mA
Receiver Electrical Characteristics
VDIFF_RX(D) Receiver dominant state differential input voltage range, bus biasing active –12V ≤ VCANL ≤ +12V
–12V ≤ VCANH ≤ +12V		 0.9 8 V
VDIFF_RX(R) Receiver recessive state differential input voltage range, bus biasing active –12V ≤ VCANL ≤ +12V
–12V ≤ VCANH ≤ +12V		 -3 0.5 V
VHYS Hysteresis voltage for input-threshold, normal and selective wake modes -12V ≤ VCM ≤ 12V 80 mV
VDIFF_RX(D_INACT) Receiver dominant state differential input voltage range, bus biasing in-active –12V ≤ VCANL ≤ +12V
–12V ≤ VCANH ≤ +12V		 1.15 8 V
VDIFF_RX(R_INACT) Receiver recessive state differential input voltage range, bus biasing in-active –12V ≤ VCANL ≤ +12V
–12V ≤ VCANH ≤ +12V		 –3 0.4 V
VCM Common mode range: –12 12 V
ILKG(IOFF) Power-off (unpowered) bus input leakage current CANH = CANL = 5V 5 µA
CI powered Normal Input capacitance to ground (CANH or CANL) TXD = VCC, VIO = VCC 20 pF
CID powered Normal Differential input capacitance TXD = VCC, VIO = VCC 10 pF
RDIFF Differential input resistance during passive recessive state VTXD = VCC or VIO, normal mode: –2.0V ≤ VCANH ≤ +7.0V;
–2.0V ≤ VCANL ≤ +7.0V		 18 90 kΩ
RSE_CANH
RSE_CANL		 Single ended Input resistance during passive recessive state –2V ≤ VCANH ≤ +7V
–2V ≤ VCANL ≤ +7V		 9 45 kΩ
mR Input resistance matching: [1 – (RIN(CANH) / RIN(CANL))] × 100% VCANH = VCANL = 5V –2% 2%
TXD Terminal (CAN Transmit Data Input)
VIH High-level input voltage TCAN844 0.7 × VCC V
VIH High-level input voltage TCAN844V 0.7 × VIO V
VIL Low-level input voltage TCAN844 0.3 × VCC V
VIL Low-level input voltage TCAN844V 0.3 × VIO V
IIH High-level input leakage current TXD = VCC = VIO = 5.25V –2.5 0 1 µA
IIL Low-level input leakage current TXD = 0V, VCC = VIO = 5.25V –200 –20 µA
ILKG(OFF) Unpowered leakage current TXD = 5.25V, VCC = VIO = 0V –1 0 1 µA
CI Input Capacitance VIN = 0.4×sin(2×π×2×106×t)+2.5V 2 pF
RXD Terminal (CAN Receive Data Output)
VOH High-level input voltage IO = –2mA, TCAN844 0.8 × VCC V
VOH High-level input voltage IO = –2mA, TCAN844V 0.8 × VIO   V
VOL Low-level input voltage IO = 2 mA, TCAN844 0.2 × VCC V
VOL Low-level input voltage IO = 2mA, TCAN844V   0.2 × VIO V
ILKG(OFF) Unpowered leakage current RXD = 5.25V, VCC = VIO = 0V –1 0 1 µA
STB Terminal
VIH High-level input voltage TCAN844 0.7 × VCC V
VIH High-level input voltage TCAN844V 0.7 × VIO V
VIL Low-level input voltage TCAN844 0.3 × VCC V
VIL Low-level input voltage TCAN844V 0.3 × VIO V
IIH High-level input leakage current STB VCC = VIO = STB = 5.25V –2 2 µA
IIL Low-level input leakage current STB VCC = VIO = 5.25V, STB = 0V –20 –2 µA
ILKG(OFF) Unpowered leakage current STB = 5.25V, VCC = VIO = 0V –1 0 1 µA