TDA2Px ADAS applications processor 23mm package (ACD package) silicon revision 1.0

1 Device Overview

1.1 Features

• Architecture designed for ADAS applications
• Video, image, and graphics processing support
  • Full-HD video (1920 × 1080p, 60 fps)
  • Multiple video input and video output
• Dual Arm®Cortex®-A15 microprocessor subsystem
• Up to two C66x floating-point VLIW DSP
  • Fully object-code compatible with C67x and C64x+
  • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
• Up to 2.5MB of on-chip L3 RAM
• Level 3 (L3) and Level 4 (L4) interconnects
• Two DDR2/DDR3/DDR3L Memory Interface (EMIF) Modules
  • Supports up to DDR2-800 and DDR3-1333
  • Up to 2GB supported per EMIF
• Dual Arm® Cortex®-M4 Image Processing Units (IPU)
• Vision AccelerationPac
  • Up to Two Embedded Vision Engines (EVEs)
• Imaging Subsystem (ISS)
  • Image Signal Processor (ISP)
  • Wide Dynamic Range and Lens Distortion Correction (WDR and Mesh LDC)
  • One Camera Adaptation Layer (CAL_B)
• IVA-HD subsystem
• Display subsystem
  • Display controller with DMA engine and up to three pipelines
  • HDMI™ Encoder: HDMI 1.4a and DVI 1.0 Compliant
• 2D-graphics accelerator (BB2D) subsystem
  • Vivante® GC320 core
• Video Processing Engine (VPE)
• Dual-core PowerVR® SGX544 3D GPU
• Two Video Input Port (VIP) modules
  • Support for up to eight multiplexed input ports
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA) controller
• 2-Port Gigabit Ethernet (GMAC)
• Up to Two Controller Area Network (DCAN) modules
  • CAN 2.0B protocol
• Modular Controller Area Network (MCAN) module
  • CAN 2.0B protocol with available FD (Flexible Data Rate) functionality
• MIPI CSI-2 camera serial interface
• PCI Express® 3.0 port with integrated PHY
  • One 2-lane Gen2-compliant port
  • or two 1-lane Gen2-compliant ports
• Sixteen 32-bit general-purpose timers
• 32-Bit MPU watchdog timer
• Ten configurable UART/IrDA/CIR modules
• Four Multichannel Serial Peripheral Interfaces (McSPI)
• Quad SPI interface
• Five Inter-Integrated Circuit (I²C) ports
• SATA interface
• Eight Multichannel Audio Serial Port (McASP) modules
• SuperSpeed USB 3.0 dual-role device
• Three high-speed USB 2.0 dual-role devices
• Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
• Up to 247 General-Purpose I/O (GPIO) pins
• Device security features
  • Hardware crypto accelerators and DMA
  • Firewalls
  • JTAG® lock
  • Secure keys
  • Secure ROM and boot
  • Customer programmable keys and OTP data
• Power, reset, and clock management
• On-Chip debug With CTools technology
• Automotive AEC-Q100 qualified
• 28-nm CMOS technology
• 23 mm × 23 mm, 0.8-mm pitch, 784-Pin BGA (ACD)