SPRS964H June 2016 – February 2020 TDA3LA , TDA3LX , TDA3MA , TDA3MD , TDA3MV
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
The device's analog video CVIDEO/SD-DAC TV analog composite output can be operate in one of two modes: Normal mode and TVOUT Bypass mode. In Normal mode, the device’s internal video amplifier is used. In TVOUT Bypass mode, the internal video amplifier is bypassed and an external amplifier is required.
Figure 8-72 shows a typical circuit that permits connecting the analog video output from the device to standard 75-Ω impedance video systems in Normal mode.
Figure 8-73 shows a typical circuit that permits connecting the analog video output from the device to standard 75-Ω impedance video systems in TVOUT Bypass mode.
During board design, the onboard traces and parasitics must be matched for the channel. The video DAC output pins (cvideo_tvout / cvideo_vfb) are very high-frequency analog signals and must be routed with extreme care. As a result, the paths of these signals must be as short as possible, and as isolated as possible from other interfering signals. In TVOUT Bypass mode, the load resistor and amplifier/buffer should be placed as close as possible to the cvideo_vfb pin. Other layout guidelines include:
Table 8-46 and Table 8-47 present the Static and Dynamic CVIDEO / SD-DAC TV analog composite output specifications
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Reference Current Setting Resistor (RSET) | Normal Mode | 4653 | 4700 | 4747 | Ω |
TVOUT Bypass Mode | 9900 | 10000 | 10100 | Ω | |
Output resistor between cvideo_tvout and cvideo_vfb pins (ROUT) | Normal Mode | 2673 | 2700 | 2727 | Ω |
TVOUT Bypass Mode | N/A | ||||
Load Resistor (RLOAD) | Normal Mode | 75-Ω Inside the Display | |||
TVOUT Bypass Mode | 1485 | 1500 | 1515 | Ω | |
AC-Coupling Capacitor (Optional) [CAC] | Normal Mode | 220 | µF | ||
TVOUT Bypass Mode | See External Amplifier Specification | ||||
Total Capacitance from cvideo_tvout to vssa_dac | Normal Mode | 300 | pF | ||
TVOUT Bypass Mode | N/A | ||||
Resolution | 10 | Bits | |||
Integral Non-Linearity (INL), Best Fit | Normal Mode | -4 | 4 | LSB | |
TVOUT Bypass Mode | -1 | 1 | LSB | ||
Differential Non-Linearity (DNL) | Normal Mode | -2.5 | 2.5 | LSB | |
TVOUT Bypass Mode | -1 | 1 | LSB | ||
Full-Scale Output Voltage | Normal Mode (RLOAD = 75 Ω) | 1.3 | V | ||
TVOUT Bypass Mode (RLOAD = 1.5 kΩ) | 0.7 | V | |||
Full-Scale Output Current | Normal Mode | N/A | |||
TVOUT Bypass Mode | 470 | uA | |||
Gain Error | Normal Mode (Composite) and TVOUT Bypass Mode | -10 | 10 | %FS | |
Normal Mode (S-Video) | -20 | 20 | %FS | ||
Gain Mismatch (Luma-to-Chroma) | Normal Mode (Composite) | N/A | |||
Normal Mode (S-Video) | -10 | 10 | % | ||
Output Impedance | Looking into cvideo_tvout nodes | 75 | Ω |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Output Update Rate (FCLK) | 54 | 60 | MHz | ||
Signal Bandwidth | 3 dB | 6 | MHz | ||
Spurious-Free Dynamic Range (SFDR) within bandwidth | FCLK = 54 MHz, FOUT = 1 MHz | 50 | dBc | ||
Signal-to-Noise Ration (SNR) | FCLK = 54 MHz, FOUT = 1 MHz | 54 | dB | ||
Power Supply Rejection (PSR) | Normal Mode, 100 mVpp @ 6 MHz on vdda_dac | 6 | dB | ||
TVOUT Bypass Mode, 100 mVpp @ 6 MHz on vdda_dac | 20 |