SPRSP79B February   2023  – December 2023 TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
    1. 3.1 Functional Block Diagram
  5. Device Comparison
  6. Terminal Configuration and Functions
    1. 5.1 Pin Diagrams
    2. 5.2 Pin Attributes
      1.      10
      2.      11
    3. 5.3 Signal Descriptions
      1.      13
      2. 5.3.1  ADC
        1. 5.3.1.1 MCU Domain
          1.        16
          2.        17
          3.        18
      3. 5.3.2  DDRSS
        1. 5.3.2.1 MAIN Domain
          1.        21
          2.        22
          3.        23
          4.        24
      4. 5.3.3  GPIO
        1. 5.3.3.1 MAIN Domain
          1.        27
        2. 5.3.3.2 WKUP Domain
          1.        29
      5. 5.3.4  I2C
        1. 5.3.4.1 MAIN Domain
          1.        32
          2.        33
          3.        34
          4.        35
          5.        36
          6.        37
          7.        38
        2. 5.3.4.2 MCU Domain
          1.        40
          2.        41
        3. 5.3.4.3 WKUP Domain
          1.        43
      6. 5.3.5  I3C
        1. 5.3.5.1 MCU Domain
          1.        46
      7. 5.3.6  MCAN
        1. 5.3.6.1 MAIN Domain
          1.        49
          2.        50
          3.        51
          4.        52
          5.        53
          6.        54
          7.        55
          8.        56
          9.        57
          10.        58
          11.        59
          12.        60
          13.        61
          14.        62
          15.        63
          16.        64
          17.        65
          18.        66
        2. 5.3.6.2 MCU Domain
          1.        68
          2.        69
      8. 5.3.7  MCSPI
        1. 5.3.7.1 MAIN Domain
          1.        72
          2.        73
          3.        74
          4.        75
          5.        76
          6.        77
          7.        78
        2. 5.3.7.2 MCU Domain
          1.        80
          2.        81
      9. 5.3.8  UART
        1. 5.3.8.1 MAIN Domain
          1.        84
          2.        85
          3.        86
          4.        87
          5.        88
          6.        89
          7.        90
          8.        91
          9.        92
          10.        93
        2. 5.3.8.2 MCU Domain
          1.        95
        3. 5.3.8.3 WKUP Domain
          1.        97
      10. 5.3.9  MDIO
        1. 5.3.9.1 MAIN Domain
          1.        100
          2.        101
        2. 5.3.9.2 MCU Domain
          1.        103
      11. 5.3.10 UFS
        1. 5.3.10.1 MAIN Domain
          1.        106
      12. 5.3.11 CPSW2G
        1. 5.3.11.1 MAIN Domain
          1.        109
        2. 5.3.11.2 MCU Domain
          1.        111
      13. 5.3.12 SGMII
        1. 5.3.12.1 MAIN Domain
          1.        114
      14. 5.3.13 ECAP
        1. 5.3.13.1 MAIN Domain
          1.        117
          2.        118
          3.        119
      15. 5.3.14 EQEP
        1. 5.3.14.1 MAIN Domain
          1.        122
          2.        123
          3.        124
      16. 5.3.15 EPWM
        1. 5.3.15.1 MAIN Domain
          1.        127
          2.        128
          3.        129
          4.        130
          5.        131
          6.        132
          7.        133
      17. 5.3.16 USB
        1. 5.3.16.1 MAIN Domain
          1.        136
      18. 5.3.17 Display Port
        1. 5.3.17.1 MAIN Domain
          1.        139
      19. 5.3.18 PCIE
        1. 5.3.18.1 MAIN Domain
          1.        142
      20. 5.3.19 SERDES
        1. 5.3.19.1 MAIN Domain
          1.        145
          2.        146
          3.        147
          4.        148
      21. 5.3.20 DSI
        1. 5.3.20.1 MAIN Domain
          1.        151
          2.        152
      22. 5.3.21 CSI
        1. 5.3.21.1 MAIN Domain
          1.        155
          2.        156
          3.        157
      23. 5.3.22 MCASP
        1. 5.3.22.1 MAIN Domain
          1.        160
          2.        161
          3.        162
          4.        163
          5.        164
      24. 5.3.23 DMTIMER
        1. 5.3.23.1 MAIN Domain
          1.        167
        2. 5.3.23.2 MCU Domain
          1.        169
      25. 5.3.24 CPTS
        1. 5.3.24.1 MAIN Domain
          1.        172
        2. 5.3.24.2 MCU Domain
          1.        174
      26. 5.3.25 DSS
        1. 5.3.25.1 MAIN Domain
          1.        177
      27. 5.3.26 GPMC
        1. 5.3.26.1 MAIN Domain
          1.        180
      28. 5.3.27 MMC
        1. 5.3.27.1 MAIN Domain
          1.        183
          2.        184
      29. 5.3.28 OSPI
        1. 5.3.28.1 MCU Domain
          1.        187
          2.        188
      30. 5.3.29 Hyperbus
        1. 5.3.29.1 MCU Domain
          1.        191
      31. 5.3.30 Emulation and Debug
        1. 5.3.30.1 MAIN Domain
          1.        194
          2.        195
      32. 5.3.31 System and Miscellaneous
        1. 5.3.31.1 Boot Mode configuration
          1.        198
        2. 5.3.31.2 Clock
          1.        200
          2.        201
        3. 5.3.31.3 System
          1.        203
          2.        204
        4. 5.3.31.4 EFUSE
          1.        206
        5. 5.3.31.5 VMON
          1.        208
      33. 5.3.32 Power
        1.       210
    4. 5.4 Pin Connectivity Requirements
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Power-On-Hour (POH) Limits
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Operating Performance Points
    6. 6.6  Electrical Characteristics
      1. 6.6.1  I2C, Open-Drain, Fail-Safe (I2C OD FS) Electrical Characteristics
      2. 6.6.2  Fail-Safe Reset (FS Reset) Electrical Characteristics
      3. 6.6.3  HFOSC/LFOSC Electrical Characteristics
      4. 6.6.4  eMMCPHY Electrical Characteristics
      5. 6.6.5  SDIO Electrical Characteristics
      6. 6.6.6  CSI2/DSI D-PHY Electrical Characteristics
      7. 6.6.7  ADC12B Electrical Characteristics
      8. 6.6.8  LVCMOS Electrical Characteristics
      9. 6.6.9  USB2PHY Electrical Characteristics
      10. 6.6.10 SerDes 2-L-PHY/4-L-PHY Electrical Characteristics
      11. 6.6.11 UFS M-PHY Electrical Characteristics
      12. 6.6.12 eDP/DP AUX-PHY Electrical Characteristics
      13. 6.6.13 DDR0 Electrical Characteristics
    7. 6.7  VPP Specifications for One-Time Programmable (OTP) eFuses
      1. 6.7.1 Recommended Operating Conditions for OTP eFuse Programming
      2. 6.7.2 Hardware Requirements
      3. 6.7.3 Programming Sequence
      4. 6.7.4 Impact to Your Hardware Warranty
    8. 6.8  Thermal Resistance Characteristics
      1. 6.8.1 Thermal Resistance Characteristics for ALY Package
    9. 6.9  Temperature Sensor Characteristics
    10. 6.10 Timing and Switching Characteristics
      1. 6.10.1 Timing Parameters and Information
      2. 6.10.2 Power Supply Sequencing
        1. 6.10.2.1 Power Supply Slew Rate Requirement
        2. 6.10.2.2 Combined MCU and Main Domains Power- Up Sequencing
        3. 6.10.2.3 Combined MCU and Main Domains Power- Down Sequencing
        4. 6.10.2.4 Isolated MCU and Main Domains Power- Up Sequencing
        5. 6.10.2.5 Isolated MCU and Main Domains Power- Down Sequencing
        6. 6.10.2.6 Independent MCU and Main Domains, Entry and Exit of MCU Only Sequencing
        7. 6.10.2.7 Independent MCU and Main Domains, Entry and Exit of DDR Retention State
        8. 6.10.2.8 Independent MCU and Main Domains, Entry and Exit of GPIO Retention Sequencing
      3. 6.10.3 System Timing
        1. 6.10.3.1 Reset Timing
        2. 6.10.3.2 Safety Signal Timing
        3. 6.10.3.3 Clock Timing
      4. 6.10.4 Clock Specifications
        1. 6.10.4.1 Input and Output Clocks / Oscillators
          1. 6.10.4.1.1 WKUP_OSC0 Internal Oscillator Clock Source
            1. 6.10.4.1.1.1 Load Capacitance
            2. 6.10.4.1.1.2 Shunt Capacitance
          2. 6.10.4.1.2 WKUP_OSC0 LVCMOS Digital Clock Source
          3. 6.10.4.1.3 Auxiliary OSC1 Internal Oscillator Clock Source
            1. 6.10.4.1.3.1 Load Capacitance
            2. 6.10.4.1.3.2 Shunt Capacitance
          4. 6.10.4.1.4 Auxiliary OSC1 LVCMOS Digital Clock Source
          5. 6.10.4.1.5 Auxiliary OSC1 Not Used
        2. 6.10.4.2 Output Clocks
        3. 6.10.4.3 PLLs
        4. 6.10.4.4 Module and Peripheral Clocks Frequencies
      5. 6.10.5 Peripherals
        1. 6.10.5.1  ATL
          1. 6.10.5.1.1 ATL_PCLK Timing Requirements
          2. 6.10.5.1.2 ATL_AWS[x] Timing Requirements
          3. 6.10.5.1.3 ATL_BWS[x] Timing Requirements
          4. 6.10.5.1.4 ATCLK[x] Switching Characteristics
        2. 6.10.5.2  CPSW2G
          1. 6.10.5.2.1 CPSW2G MDIO Interface Timings
          2. 6.10.5.2.2 CPSW2G RMII Timings
            1. 6.10.5.2.2.1 CPSW2G RMII[x]_REF_CLK Timing Requirements – RMII Mode
            2. 6.10.5.2.2.2 CPSW2G RMII[x]_RXD[1:0], RMII[x]_CRS_DV, and RMII[x]_RX_ER Timing Requirements – RMII Mode
            3. 6.10.5.2.2.3 CPSW2G RMII[x]_TXD[1:0], and RMII[x]_TX_EN Switching Characteristics – RMII Mode
          3. 6.10.5.2.3 CPSW2G RGMII Timings
            1. 6.10.5.2.3.1 RGMII[x]_RXC Timing Requirements – RGMII Mode
            2. 6.10.5.2.3.2 CPSW2G Timing Requirements for RGMII[x]_RD[3:0], and RGMII[x]_RCTL – RGMII Mode
            3. 6.10.5.2.3.3 CPSW2G RGMII[x]_TXC Switching Characteristics – RGMII Mode
            4. 6.10.5.2.3.4 RGMII[x]_TD[3:0], and RGMII[x]_TX_CTL Switching Characteristics – RGMII Mode
        3. 6.10.5.3  CSI-2
        4. 6.10.5.4  DDRSS
        5. 6.10.5.5  DSS
        6. 6.10.5.6  eCAP
          1. 6.10.5.6.1 Timing Requirements for eCAP
          2. 6.10.5.6.2 Switching Characteristics for eCAP
        7. 6.10.5.7  EPWM
          1. 6.10.5.7.1 Timing Requirements for eHRPWM
          2. 6.10.5.7.2 Switching Characteristics for eHRPWM
        8. 6.10.5.8  eQEP
          1. 6.10.5.8.1 Timing Requirements for eQEP
          2. 6.10.5.8.2 Switching Characteristics for eQEP
        9. 6.10.5.9  GPIO
          1. 6.10.5.9.1 GPIO Timing Requirements
          2. 6.10.5.9.2 GPIO Switching Characteristics
        10. 6.10.5.10 GPMC
          1. 6.10.5.10.1 GPMC and NOR Flash — Synchronous Mode
            1. 6.10.5.10.1.1 GPMC and NOR Flash Timing Requirements — Synchronous Mode
            2. 6.10.5.10.1.2 GPMC and NOR Flash Switching Characteristics – Synchronous Mode
          2. 6.10.5.10.2 GPMC and NOR Flash — Asynchronous Mode
            1. 6.10.5.10.2.1 GPMC and NOR Flash Timing Requirements – Asynchronous Mode
            2. 6.10.5.10.2.2 GPMC and NOR Flash Switching Characteristics – Asynchronous Mode
          3. 6.10.5.10.3 GPMC and NAND Flash — Asynchronous Mode
            1. 6.10.5.10.3.1 GPMC and NAND Flash Timing Requirements – Asynchronous Mode
            2. 6.10.5.10.3.2 GPMC and NAND Flash Switching Characteristics – Asynchronous Mode
          4. 6.10.5.10.4 GPMC0 IOSET
        11. 6.10.5.11 HyperBus
          1. 6.10.5.11.1 Timing Requirements for HyperBus
          2. 6.10.5.11.2 HyperBus 166 MHz Switching Characteristics
          3. 6.10.5.11.3 HyperBus 100 MHz Switching Characteristics
        12. 6.10.5.12 I2C
        13. 6.10.5.13 I3C
        14. 6.10.5.14 MCAN
        15. 6.10.5.15 MCASP
        16. 6.10.5.16 MCSPI
          1. 6.10.5.16.1 MCSPI — Controller Mode
          2. 6.10.5.16.2 MCSPI — Peripheral Mode
        17. 6.10.5.17 MMCSD
          1. 6.10.5.17.1 MMC0 - eMMC Interface
            1. 6.10.5.17.1.1 Legacy SDR Mode
            2. 6.10.5.17.1.2 High Speed SDR Mode
            3. 6.10.5.17.1.3 High Speed DDR Mode
            4. 6.10.5.17.1.4 HS200 Mode
            5. 6.10.5.17.1.5 HS400 Mode
          2. 6.10.5.17.2 MMC1/2 - SD/SDIO Interface
            1. 6.10.5.17.2.1 Default Speed Mode
            2. 6.10.5.17.2.2 High Speed Mode
            3. 6.10.5.17.2.3 UHS–I SDR12 Mode
            4. 6.10.5.17.2.4 UHS–I SDR25 Mode
            5. 6.10.5.17.2.5 UHS–I SDR50 Mode
            6. 6.10.5.17.2.6 UHS–I DDR50 Mode
            7. 6.10.5.17.2.7 UHS–I SDR104 Mode
        18. 6.10.5.18 CPTS
          1. 6.10.5.18.1 CPTS Timing Requirements
          2. 6.10.5.18.2 CPTS Switching Characteristics
        19. 6.10.5.19 OSPI
          1. 6.10.5.19.1 OSPI0 PHY Mode
            1. 6.10.5.19.1.1 OSPI With Data Training
              1. 6.10.5.19.1.1.1 OSPI Switching Characteristics – Data Training
            2. 6.10.5.19.1.2 OSPI Without Data Training
              1. 6.10.5.19.1.2.1 OSPI Timing Requirements – SDR Mode
              2. 6.10.5.19.1.2.2 OSPI Switching Characteristics – SDR Mode
              3. 6.10.5.19.1.2.3 OSPI Timing Requirements – DDR Mode
              4. 6.10.5.19.1.2.4 OSPI Switching Characteristics – DDR Mode
          2. 6.10.5.19.2 OSPI0 Tap Mode
            1. 6.10.5.19.2.1 OSPI0 Tap SDR Timing
            2. 6.10.5.19.2.2 OSPI0 Tap DDR Timing
        20. 6.10.5.20 OLDI
          1. 6.10.5.20.1 OLDI Switching Characteristics
        21. 6.10.5.21 PCIE
        22. 6.10.5.22 Timers
          1. 6.10.5.22.1 Timing Requirements for Timers
          2. 6.10.5.22.2 Switching Characteristics for Timers
        23. 6.10.5.23 UART
          1. 6.10.5.23.1 Timing Requirements for UART
          2. 6.10.5.23.2 UART Switching Characteristics
        24. 6.10.5.24 USB
      6. 6.10.6 Emulation and Debug
        1. 6.10.6.1 Trace
        2. 6.10.6.2 JTAG
          1. 6.10.6.2.1 JTAG Electrical Data and Timing
            1. 6.10.6.2.1.1 JTAG Timing Requirements
            2. 6.10.6.2.1.2 JTAG Switching Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Processor Subsystems
      1. 7.2.1 Arm Cortex-A72
      2. 7.2.2 Arm Cortex-R5F
      3. 7.2.3 DSP C71x
    3. 7.3 Accelerators and Coprocessors
      1. 7.3.1 GPU
      2. 7.3.2 VPAC
      3. 7.3.3 DMPAC
    4. 7.4 Other Subsystems
      1. 7.4.1 MSMC
      2. 7.4.2 NAVSS
        1. 7.4.2.1 NAVSS0
        2. 7.4.2.2 MCU_NAVSS
      3. 7.4.3 PDMA Controller
      4. 7.4.4 Power Supply
      5. 7.4.5 Peripherals
        1. 7.4.5.1  ADC
        2. 7.4.5.2  ATL
        3. 7.4.5.3  CSI
          1. 7.4.5.3.1 Camera Streaming Interface Receiver (CSI_RX_IF) and MIPI DPHY Receiver (DPHY_RX)
          2. 7.4.5.3.2 Camera Streaming Interface Transmitter (CSI_TX_IF)
        4. 7.4.5.4  CPSW2G
        5. 7.4.5.5  CPSW9G
        6. 7.4.5.6  DCC
        7. 7.4.5.7  DDRSS
        8. 7.4.5.8  DSS
          1. 7.4.5.8.1 DSI
          2. 7.4.5.8.2 eDP
        9. 7.4.5.9  VPFE
        10. 7.4.5.10 eCAP
        11. 7.4.5.11 EPWM
        12. 7.4.5.12 ELM
        13. 7.4.5.13 ESM
        14. 7.4.5.14 eQEP
        15. 7.4.5.15 GPIO
        16. 7.4.5.16 GPMC
        17. 7.4.5.17 Hyperbus
        18. 7.4.5.18 I2C
        19. 7.4.5.19 I3C
        20. 7.4.5.20 MCAN
        21. 7.4.5.21 MCASP
        22. 7.4.5.22 MCRC Controller
        23. 7.4.5.23 MCSPI
        24. 7.4.5.24 MMC/SD
        25. 7.4.5.25 OSPI
        26. 7.4.5.26 PCIE
        27. 7.4.5.27 SerDes
        28. 7.4.5.28 WWDT
        29. 7.4.5.29 Timers
        30. 7.4.5.30 UART
        31. 7.4.5.31 USB
        32. 7.4.5.32 UFS
  9. Applications, Implementation, and Layout
    1. 8.1 Device Connection and Layout Fundamentals
      1. 8.1.1 Power Supply Decoupling and Bulk Capacitors
        1. 8.1.1.1 Power Distribution Network Implementation Guidance
      2. 8.1.2 External Oscillator
      3. 8.1.3 JTAG and EMU
      4. 8.1.4 Reset
      5. 8.1.5 Unused Pins
      6. 8.1.6 Hardware Design Guide for JacintoTM 7 Devices
    2. 8.2 Peripheral- and Interface-Specific Design Information
      1. 8.2.1 LPDDR4 Board Design and Layout Guidelines
      2. 8.2.2 OSPI and QSPI Board Design and Layout Guidelines
        1. 8.2.2.1 No Loopback and Internal Pad Loopback
        2. 8.2.2.2 External Board Loopback
        3. 8.2.2.3 DQS (only available in Octal Flash devices)
      3. 8.2.3 USB VBUS Design Guidelines
      4. 8.2.4 System Power Supply Monitor Design Guidelines using VMON/POK
      5. 8.2.5 High Speed Differential Signal Routing Guidance
      6. 8.2.6 Thermal Solution Guidance
  10. Device and Documentation Support
    1. 9.1 Device Nomenclature
      1. 9.1.1 Standard Package Symbolization
      2. 9.1.2 Device Naming Convention
    2. 9.2 Tools and Software
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • ALY|1414
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Table 5-1 Pin Attributes (ALY Package)
Ball
Num [1]
Ball
Name [2]
PADCFG Register [15]
PADCFG Address [16]
Signal
Name [3]
Mux
Mode [4]
Signal
Type [5]
I/O
Voltage [6]
Ball State
DURING
Reset
(RX/TX/PULL) [7]
Ball State
AFTER
Reset
(RX/TX/PULL) [8]
Mux
Mode
AFTER
Reset [9]
Pull
Type [10]
Power [11]Hys [12]Voltage
Buffer
Type [13]
IO
RET [14]
V29CAP_VDDS0CAP_VDDS0CAP
L27CAP_VDDS0_MCUCAP_VDDS0_MCUCAP
L25CAP_VDDS1_MCUCAP_VDDS1_MCUCAP
T29CAP_VDDS2CAP_VDDS2CAP
L26CAP_VDDS2_MCUCAP_VDDS2_MCUCAP
P29CAP_VDDS5CAP_VDDS5CAP
AN30CSI0_RXCLKNCSI0_RXCLKNI1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AN29CSI0_RXCLKPCSI0_RXCLKPI1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AM28CSI0_RXRCALIBCSI0_RXRCALIBA1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AP32CSI1_RXCLKNCSI1_RXCLKNI1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AP31CSI1_RXCLKPCSI1_RXCLKPI1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AL28CSI1_RXRCALIBCSI1_RXRCALIBA1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AN32CSI2_RXCLKNCSI2_RXCLKNI1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AN33CSI2_RXCLKPCSI2_RXCLKPI1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AM31CSI2_RXRCALIBCSI2_RXRCALIBA1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AU33CSI0_RXN0CSI0_RXN0I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AT32CSI0_RXN1CSI0_RXN1I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AV31CSI0_RXN2CSI0_RXN2I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AR30CSI0_RXN3CSI0_RXN3I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AU32CSI0_RXP0CSI0_RXP0I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AT31CSI0_RXP1CSI0_RXP1I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AV30CSI0_RXP2CSI0_RXP2I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AR29CSI0_RXP3CSI0_RXP3I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AT35CSI1_RXN0CSI1_RXN0I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AU36CSI1_RXN1CSI1_RXN1I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AR33CSI1_RXN2CSI1_RXN2I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AV34CSI1_RXN3CSI1_RXN3I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AT34CSI1_RXP0CSI1_RXP0I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AU35CSI1_RXP1CSI1_RXP1I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AR32CSI1_RXP2CSI1_RXP2I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AV33CSI1_RXP3CSI1_RXP3I1.8 VVDDA_0P8_CSIRX0_1 / VDDA_1P8_CSIRX0_1D-PHY
AR36CSI2_RXN0CSI2_RXN0I1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AT38CSI2_RXN1CSI2_RXN1I1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AP35CSI2_RXN2CSI2_RXN2I1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AV37CSI2_RXN3CSI2_RXN3I1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AR35CSI2_RXP0CSI2_RXP0I1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AT37CSI2_RXP1CSI2_RXP1I1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AP34CSI2_RXP2CSI2_RXP2I1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AV36CSI2_RXP3CSI2_RXP3I1.8 VVDDA_0P8_CSIRX2 / VDDA_1P8_CSIRX2D-PHY
AB2DDR0_CKNDDR0_CKNIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AC1DDR0_CKPDDR0_CKPIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AD5DDR0_RESETnDDR0_RESETnIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AC8DDR0_RETDDR0_RETI1.1 VVDDS_DDR / VDDS_DDR_C0DDR
A11DDR1_CKNDDR1_CKNIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B10DDR1_CKPDDR1_CKPIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
G10DDR1_RESETnDDR1_RESETnIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
G8DDR1_RETDDR1_RETI1.1 VVDDS_DDR / VDDS_DDR_C1DDR
K1DDR2_CKNDDR2_CKNIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
L2DDR2_CKPDDR2_CKPIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
J5DDR2_RESETnDDR2_RESETnIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
L8DDR2_RETDDR2_RETI1.1 VVDDS_DDR / VDDS_DDR_C2DDR
B25DDR3_CKNDDR3_CKNIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A24DDR3_CKPDDR3_CKPIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C23DDR3_RESETnDDR3_RESETnIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
G27DDR3_RETDDR3_RETI1.1 VVDDS_DDR / VDDS_DDR_C3DDR
AD2DDR0_CA0DDR0_CA0IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AC5DDR0_CA1DDR0_CA1IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AB4DDR0_CA2DDR0_CA2IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AC4DDR0_CA3DDR0_CA3IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AB3DDR0_CA4DDR0_CA4IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AC3DDR0_CA5DDR0_CA5IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AE8DDR0_CAL0DDR0_CAL0A1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AB6DDR0_CKE0DDR0_CKE0IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AD3DDR0_CKE1DDR0_CKE1IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AD7DDR0_CSn0_0DDR0_CSn0_0IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AC7DDR0_CSn0_1DDR0_CSn0_1IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AB7DDR0_CSn1_0DDR0_CSn1_0IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AD6DDR0_CSn1_1DDR0_CSn1_1IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
V3DDR0_DM0DDR0_DM0IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AA4DDR0_DM1DDR0_DM1IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AG2DDR0_DM2DDR0_DM2IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AJ5DDR0_DM3DDR0_DM3IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
U2DDR0_DQ0DDR0_DQ0IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
U4DDR0_DQ1DDR0_DQ1IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
W6DDR0_DQ2DDR0_DQ2IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
W5DDR0_DQ3DDR0_DQ3IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
V4DDR0_DQ4DDR0_DQ4IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
V7DDR0_DQ5DDR0_DQ5IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
U5DDR0_DQ6DDR0_DQ6IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
V6DDR0_DQ7DDR0_DQ7IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
Y2DDR0_DQ8DDR0_DQ8IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
W3DDR0_DQ9DDR0_DQ9IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AA3DDR0_DQ10DDR0_DQ10IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
W2DDR0_DQ11DDR0_DQ11IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AA6DDR0_DQ12DDR0_DQ12IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
Y4DDR0_DQ13DDR0_DQ13IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
Y5DDR0_DQ14DDR0_DQ14IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AA7DDR0_DQ15DDR0_DQ15IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AF2DDR0_DQ16DDR0_DQ16IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AE7DDR0_DQ17DDR0_DQ17IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AG3DDR0_DQ18DDR0_DQ18IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AF5DDR0_DQ19DDR0_DQ19IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AE6DDR0_DQ20DDR0_DQ20IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AF4DDR0_DQ21DDR0_DQ21IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AE3DDR0_DQ22DDR0_DQ22IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AE4DDR0_DQ23DDR0_DQ23IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AG5DDR0_DQ24DDR0_DQ24IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AH3DDR0_DQ25DDR0_DQ25IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AJ2DDR0_DQ26DDR0_DQ26IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AH4DDR0_DQ27DDR0_DQ27IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AJ4DDR0_DQ28DDR0_DQ28IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AH6DDR0_DQ29DDR0_DQ29IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AH7DDR0_DQ30DDR0_DQ30IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AG6DDR0_DQ31DDR0_DQ31IO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
V1DDR0_DQS0NDDR0_DQS0NIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
U1DDR0_DQS0PDDR0_DQS0PIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
Y1DDR0_DQS1NDDR0_DQS1NIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AA1DDR0_DQS1PDDR0_DQS1PIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AE1DDR0_DQS2NDDR0_DQS2NIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AF1DDR0_DQS2PDDR0_DQS2PIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AH1DDR0_DQS3NDDR0_DQS3NIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
AJ1DDR0_DQS3PDDR0_DQS3PIO1.1 VVDDS_DDR / VDDS_DDR_C0DDR
F12DDR1_CA0DDR1_CA0IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C12DDR1_CA1DDR1_CA1IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B12DDR1_CA2DDR1_CA2IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C11DDR1_CA3DDR1_CA3IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
D12DDR1_CA4DDR1_CA4IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
E10DDR1_CA5DDR1_CA5IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
G14DDR1_CAL0DDR1_CAL0A1.1 VVDDS_DDR / VDDS_DDR_C1DDR
D11DDR1_CKE0DDR1_CKE0IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C10DDR1_CKE1DDR1_CKE1IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
E11DDR1_CSn0_0DDR1_CSn0_0IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
G11DDR1_CSn0_1DDR1_CSn0_1IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
F10DDR1_CSn1_0DDR1_CSn1_0IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
G12DDR1_CSn1_1DDR1_CSn1_1IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
E17DDR1_DM0DDR1_DM0IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C15DDR1_DM1DDR1_DM1IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
D8DDR1_DM2DDR1_DM2IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C1DDR1_DM3DDR1_DM3IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
F16DDR1_DQ0DDR1_DQ0IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
G16DDR1_DQ1DDR1_DQ1IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
F15DDR1_DQ2DDR1_DQ2IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
E15DDR1_DQ3DDR1_DQ3IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
D16DDR1_DQ4DDR1_DQ4IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C16DDR1_DQ5DDR1_DQ5IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B17DDR1_DQ6DDR1_DQ6IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
D17DDR1_DQ7DDR1_DQ7IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B15DDR1_DQ8DDR1_DQ8IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B14DDR1_DQ9DDR1_DQ9IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C13DDR1_DQ10DDR1_DQ10IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
D13DDR1_DQ11DDR1_DQ11IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
F13DDR1_DQ12DDR1_DQ12IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
G13DDR1_DQ13DDR1_DQ13IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
E14DDR1_DQ14DDR1_DQ14IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
D14DDR1_DQ15DDR1_DQ15IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
E8DDR1_DQ16DDR1_DQ16IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
G9DDR1_DQ17DDR1_DQ17IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
F9DDR1_DQ18DDR1_DQ18IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
D9DDR1_DQ19DDR1_DQ19IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C9DDR1_DQ20DDR1_DQ20IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B8DDR1_DQ21DDR1_DQ21IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B7DDR1_DQ22DDR1_DQ22IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C7DDR1_DQ23DDR1_DQ23IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B2DDR1_DQ24DDR1_DQ24IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B3DDR1_DQ25DDR1_DQ25IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B4DDR1_DQ26DDR1_DQ26IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
B5DDR1_DQ27DDR1_DQ27IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A6DDR1_DQ28DDR1_DQ28IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C5DDR1_DQ29DDR1_DQ29IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C6DDR1_DQ30DDR1_DQ30IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
C3DDR1_DQ31DDR1_DQ31IO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A17DDR1_DQS0NDDR1_DQS0NIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A16DDR1_DQS0PDDR1_DQS0PIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A14DDR1_DQS1NDDR1_DQS1NIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A13DDR1_DQS1PDDR1_DQS1PIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A9DDR1_DQS2NDDR1_DQS2NIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A8DDR1_DQS2PDDR1_DQS2PIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A4DDR1_DQS3NDDR1_DQS3NIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
A3DDR1_DQS3PDDR1_DQS3PIO1.1 VVDDS_DDR / VDDS_DDR_C1DDR
K3DDR2_CA0DDR2_CA0IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
L3DDR2_CA1DDR2_CA1IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
K5DDR2_CA2DDR2_CA2IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
L4DDR2_CA3DDR2_CA3IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
K4DDR2_CA4DDR2_CA4IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
L7DDR2_CA5DDR2_CA5IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
U7DDR2_CAL0DDR2_CAL0A1.1 VVDDS_DDR / VDDS_DDR_C2DDR
L6DDR2_CKE0DDR2_CKE0IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
J2DDR2_CKE1DDR2_CKE1IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
J3DDR2_CSn0_0DDR2_CSn0_0IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
J6DDR2_CSn0_1DDR2_CSn0_1IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
J7DDR2_CSn1_0DDR2_CSn1_0IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
K7DDR2_CSn1_1DDR2_CSn1_1IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
T2DDR2_DM0DDR2_DM0IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
M6DDR2_DM1DDR2_DM1IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
G4DDR2_DM2DDR2_DM2IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
D5DDR2_DM3DDR2_DM3IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
T4DDR2_DQ0DDR2_DQ0IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
R6DDR2_DQ1DDR2_DQ1IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
R3DDR2_DQ2DDR2_DQ2IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
R4DDR2_DQ3DDR2_DQ3IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
P6DDR2_DQ4DDR2_DQ4IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
P5DDR2_DQ5DDR2_DQ5IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
T5DDR2_DQ6DDR2_DQ6IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
R7DDR2_DQ7DDR2_DQ7IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
N2DDR2_DQ8DDR2_DQ8IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
N4DDR2_DQ9DDR2_DQ9IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
P2DDR2_DQ10DDR2_DQ10IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
P3DDR2_DQ11DDR2_DQ11IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
M7DDR2_DQ12DDR2_DQ12IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
N5DDR2_DQ13DDR2_DQ13IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
M4DDR2_DQ14DDR2_DQ14IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
M3DDR2_DQ15DDR2_DQ15IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
F3DDR2_DQ16DDR2_DQ16IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
G7DDR2_DQ17DDR2_DQ17IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
H6DDR2_DQ18DDR2_DQ18IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
H4DDR2_DQ19DDR2_DQ19IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
G2DDR2_DQ20DDR2_DQ20IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
H3DDR2_DQ21DDR2_DQ21IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
G5DDR2_DQ22DDR2_DQ22IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
F2DDR2_DQ23DDR2_DQ23IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
E4DDR2_DQ24DDR2_DQ24IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
D2DDR2_DQ25DDR2_DQ25IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
F6DDR2_DQ26DDR2_DQ26IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
F5DDR2_DQ27DDR2_DQ27IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
E3DDR2_DQ28DDR2_DQ28IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
E7DDR2_DQ29DDR2_DQ29IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
E6DDR2_DQ30DDR2_DQ30IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
D4DDR2_DQ31DDR2_DQ31IO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
R1DDR2_DQS0NDDR2_DQS0NIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
T1DDR2_DQS0PDDR2_DQS0PIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
M1DDR2_DQS1NDDR2_DQS1NIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
N1DDR2_DQS1PDDR2_DQS1PIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
G1DDR2_DQS2NDDR2_DQS2NIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
H1DDR2_DQS2PDDR2_DQS2PIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
D1DDR2_DQS3NDDR2_DQS3NIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
E1DDR2_DQS3PDDR2_DQS3PIO1.1 VVDDS_DDR / VDDS_DDR_C2DDR
D25DDR3_CA0DDR3_CA0IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
B23DDR3_CA1DDR3_CA1IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D24DDR3_CA2DDR3_CA2IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C24DDR3_CA3DDR3_CA3IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
E23DDR3_CA4DDR3_CA4IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F23DDR3_CA5DDR3_CA5IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F18DDR3_CAL0DDR3_CAL0A1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C25DDR3_CKE0DDR3_CKE0IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
G24DDR3_CKE1DDR3_CKE1IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
G23DDR3_CSn0_0DDR3_CSn0_0IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
G25DDR3_CSn0_1DDR3_CSn0_1IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F25DDR3_CSn1_0DDR3_CSn1_0IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
E24DDR3_CSn1_1DDR3_CSn1_1IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
E18DDR3_DM0DDR3_DM0IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D21DDR3_DM1DDR3_DM1IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C28DDR3_DM2DDR3_DM2IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
E30DDR3_DM3DDR3_DM3IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D18DDR3_DQ0DDR3_DQ0IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
B18DDR3_DQ1DDR3_DQ1IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C19DDR3_DQ2DDR3_DQ2IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D19DDR3_DQ3DDR3_DQ3IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F20DDR3_DQ4DDR3_DQ4IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
E20DDR3_DQ5DDR3_DQ5IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
G19DDR3_DQ6DDR3_DQ6IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F19DDR3_DQ7DDR3_DQ7IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
E21DDR3_DQ8DDR3_DQ8IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
G21DDR3_DQ9DDR3_DQ9IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F22DDR3_DQ10DDR3_DQ10IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D22DDR3_DQ11DDR3_DQ11IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C22DDR3_DQ12DDR3_DQ12IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
B21DDR3_DQ13DDR3_DQ13IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
B20DDR3_DQ14DDR3_DQ14IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C20DDR3_DQ15DDR3_DQ15IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
B28DDR3_DQ16DDR3_DQ16IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
B27DDR3_DQ17DDR3_DQ17IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C26DDR3_DQ18DDR3_DQ18IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D26DDR3_DQ19DDR3_DQ19IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F26DDR3_DQ20DDR3_DQ20IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
G26DDR3_DQ21DDR3_DQ21IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
E27DDR3_DQ22DDR3_DQ22IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D27DDR3_DQ23DDR3_DQ23IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F29DDR3_DQ24DDR3_DQ24IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
G29DDR3_DQ25DDR3_DQ25IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
F28DDR3_DQ26DDR3_DQ26IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
E28DDR3_DQ27DDR3_DQ27IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D29DDR3_DQ28DDR3_DQ28IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
C29DDR3_DQ29DDR3_DQ29IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
B30DDR3_DQ30DDR3_DQ30IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
D30DDR3_DQ31DDR3_DQ31IO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A19DDR3_DQS0NDDR3_DQS0NIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A18DDR3_DQS0PDDR3_DQS0PIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A22DDR3_DQS1NDDR3_DQS1NIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A21DDR3_DQS1PDDR3_DQS1PIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A27DDR3_DQS2NDDR3_DQS2NIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A26DDR3_DQS2PDDR3_DQS2PIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A30DDR3_DQS3NDDR3_DQS3NIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
A29DDR3_DQS3PDDR3_DQS3PIO1.1 VVDDS_DDR / VDDS_DDR_C3DDR
AP22DP0_AUXNDP0_AUXNIO1.8 VVDDA_1P8_SERDES2_4AUX-PHY
AP23DP0_AUXPDP0_AUXPIO1.8 VVDDA_1P8_SERDES2_4AUX-PHY
AP26 DSI0_TXCLKN CSI0_TXCLKNO1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI0_TXCLKNO
AP25 DSI0_TXCLKP DSI0_TXCLKPO1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI0_TXCLKPO
AM24DSI0_TXRCALIBDSI0_TXRCALIBA1.8 VVDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITXD-PHY
AP29 DSI1_TXCLKN DSI1_TXCLKNO1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI1_TXCLKNO
AP28 DSI1_TXCLKP DSI1_TXCLKPO1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI1_TXCLKPO
AL22DSI1_TXRCALIBDSI1_TXRCALIBA1.8 VVDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITXD-PHY
AU27 DSI0_TXN0 CSI0_TXN0O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI0_TXN0IO
AT26 DSI0_TXN1 CSI0_TXN1O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI0_TXN1O
AR27 DSI0_TXN2 DSI0_TXN2O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI0_TXN2O
AN24 DSI0_TXN3 DSI0_TXN3O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI0_TXN3O
AU26 DSI0_TXP0 CSI0_TXP0O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI0_TXP0IO
AT25 DSI0_TXP1 CSI0_TXP1O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI0_TXP1O
AR26 DSI0_TXP2 DSI0_TXP2O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI0_TXP2O
AN23 DSI0_TXP3 DSI0_TXP3O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI0_TXP3O
AT29 DSI1_TXN0 CSI1_TXN0O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI1_TXN0IO
AN27 DSI1_TXN1 CSI1_TXN1O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI1_TXN1O
AV28 DSI1_TXN2 CSI1_TXN2O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI1_TXN2O
AU30 DSI1_TXN3 CSI1_TXN3O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI1_TXN3O
AT28 DSI1_TXP0 DSI1_TXP0IO1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI1_TXP0O
AN26 DSI1_TXP1 CSI1_TXP1O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI1_TXP1O
AV27 DSI1_TXP2 DSI1_TXP2O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
CSI1_TXP2O
AU29 DSI1_TXP3 CSI1_TXP3O1.8 V VDDA_0P8_DSITX / VDDA_0P8_DSITX_C / VDDA_1P8_DSITX D-PHY
DSI1_TXP3O
AD36 ECAP0_IN_APWM_OUTPADCFG:
PADCONFIG_49
0x0011C0C4
ECAP0_IN_APWM_OUT0IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP4_AXR21IO
CPTS0_RFT_CLK2I
MCAN12_TX4O
VOUT0_DATA235O
GPMC0_AD56IO
GPIO0_497IO
SPI6_D08IO
SYNC0_OUT9O
TRC_DATA110O
UART2_CTSn11I
CPTS0_HW1TSPUSH12I
I2C1_SCL13IOD
UART3_RXD14I
F35EMU0PADCFG:
WKUP_PADCONFIG_75
0x4301C12C
EMU00IO1.8 V/3.3 VOn / Off / UpOn / Off / Up0PU/PDVDDSHV0_MCUYesLVCMOSNo
H34 EMU1PADCFG:
WKUP_PADCONFIG_76
0x4301C130
EMU10IO1.8 V/3.3 V On / Off / Up On / Off / Up 0 PU/PD VDDSHV0_MCU Yes LVCMOS No
MCU_OBSCLK015O
AN35 EXTINTnPADCFG:
PADCONFIG_0
0x0011C000
EXTINTn0I1.8 V/3.3 V Off / Off / Off Off / SS / Off 7 VDDSHV0 Yes I2C OPEN DRAIN No
GPIO0_07IO
AJ32 EXT_REFCLK1PADCFG:
PADCONFIG_50
0x0011C0C8
EXT_REFCLK10I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP4_ACLKX1IO
VOUT0_DATA162O
MCAN1_RX4I
GPMC0_AD66IO
GPIO0_507IO
SYNC1_OUT9O
TRC_CLK10O
UART2_RTSn11O
CPTS0_HW2TSPUSH12I
I2C1_SDA13IOD
UART3_TXD14O
AL32 GPIO0_11PADCFG:
PADCONFIG_11
0x0011C02C
MCAN17_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
VOUT0_DATA182O
GPMC0_A146OZ
GPIO0_117IO
SPI7_CS38IO
TRC_DATA2510O
GPMC0_CSn212O
UART7_RXD13I
USB0_DRVVBUS14O
AK37 GPIO0_12PADCFG:
PADCONFIG_12
0x0011C030
MCAN12_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
VOUT0_DATA172O
VOUT0_DATA225O
GPMC0_AD46IO
GPIO0_127IO
SPI6_CLK8IO
EQEP1_I9IO
TRC_DATA210O
UART9_CTSn11I
UART6_RXD12I
AN36 I2C0_SCLPADCFG:
PADCONFIG_56
0x0011C0E0
I2C0_SCL0IOD1.8 V/3.3 V Off / Off / Off On / SS / Off 7 VDDSHV0 Yes I2C OPEN DRAIN No
GPIO0_567IO
AP37 I2C0_SDAPADCFG:
PADCONFIG_57
0x0011C0E4
I2C0_SDA0IOD1.8 V/3.3 V Off / Off / Off On / SS / Off 7 VDDSHV0 Yes I2C OPEN DRAIN No
GPIO0_577IO
AE38 MCAN0_RXPADCFG:
PADCONFIG_26
0x0011C068
MCAN0_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP4_AXR11IO
VOUT0_DATA32O
GPMC0_AD156IO
GPIO0_267IO
SPI5_CS08IO
EHRPWM0_A9IO
TRC_DATA1610O
UART2_TXD11O
UART6_RTSn12O
SPI7_D013IO
AF38 MCAN0_TXPADCFG:
PADCONFIG_25
0x0011C064
MCAN0_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP2_AXR21IO
VOUT0_DATA42O
GPMC0_AD146IO
GPIO0_257IO
SPI5_CS18IO
EHRPWM0_B9IO
TRC_DATA1110O
UART2_RXD11I
UART6_CTSn12I
I2C3_SCL13IOD
AH38 MCAN1_RXPADCFG:
PADCONFIG_28
0x0011C070
MCAN1_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP4_AXR31IO
VOUT0_DATA12O
VOUT0_DATA195O
GPMC0_BE0n_CLE6O
GPIO0_287IO
SPI5_D08IO
EHRPWM0_SYNCI9I
TRC_DATA510O
UART3_RTSn11O
AJ37 MCAN1_TXPADCFG:
PADCONFIG_27
0x0011C06C
MCAN1_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP4_AFSX1IO
VOUT0_EXTPCLKIN2I
DSS_FSYNC04O
GPMC0_AD76IO
GPIO0_277IO
EHRPWM_TZn_IN59I
TRC_CTL10O
UART6_TXD11O
AH37 MCAN2_RXPADCFG:
PADCONFIG_30
0x0011C078
MCAN2_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
AUDIO_EXT_REFCLK11IO
VOUT0_PCLK2O
GPMC0_CSn16O
GPIO0_307IO
SPI6_CS18IO
EHRPWM4_B9IO
TRC_DATA1710O
UART3_TXD11O
GPMC0_DIR12O
I2C5_SDA13IOD
AC33 MCAN2_TXPADCFG:
PADCONFIG_29
0x0011C074
MCAN2_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP2_AXR31IO
VOUT0_DATA02O
VOUT0_DATA185O
GPMC0_WAIT06I
GPIO0_297IO
SPI6_D18IO
EHRPWM1_B9IO
TRC_DATA310O
UART3_RXD11I
GPMC0_DIR12O
I2C5_SCL13IOD
AJ33 MCAN12_RXPADCFG:
PADCONFIG_2
0x0011C008
MCAN12_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
UART0_DCDn1I
DSS_FSYNC13O
GPMC0_A236OZ
GPIO0_27IO
TRC_CTL10O
UART5_RXD11I
GPMC0_CSn312O
AG36 MCAN12_TXPADCFG:
PADCONFIG_1
0x0011C004
MCAN12_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
DSS_FSYNC03O
GPMC0_A246OZ
GPIO0_17IO
TRC_CLK10O
UART5_TXD11O
GPMC0_CLK12IO
AH33 MCAN13_RXPADCFG:
PADCONFIG_4
0x0011C010
MCAN13_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
UART0_DTRn1O
DSS_FSYNC33O
GPMC0_A216OZ
GPIO0_47IO
I2C4_SDA8IOD
TRC_DATA110O
UART6_TXD11O
AF33 MCAN13_TXPADCFG:
PADCONFIG_3
0x0011C00C
MCAN13_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
UART0_DSRn1I
DSS_FSYNC23O
GPMC0_A226OZ
GPIO0_37IO
TRC_DATA010O
UART4_TXD11O
GPMC0_WAIT212I
AK36 MCAN14_RXPADCFG:
PADCONFIG_6
0x0011C018
MCAN14_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
VOUT0_DATA232O
GPMC0_A196OZ
GPIO0_67IO
I2C5_SDA8IOD
TRC_DATA310O
UART9_TXD11O
AG33 MCAN14_TXPADCFG:
PADCONFIG_5
0x0011C014
MCAN14_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
UART0_RIn1I
GPMC0_A206OZ
GPIO0_57IO
I2C4_SCL8IOD
TRC_DATA210O
UART6_RXD11I
DP0_HPD13I
AJ35 MCAN15_RXPADCFG:
PADCONFIG_8
0x0011C020
MCAN15_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
VOUT0_DATA212O
GPMC0_A176OZ
GPIO0_87IO
SPI0_CS28IO
TRC_DATA2210O
I2C1_SCL12IOD
AG34 MCAN15_TXPADCFG:
PADCONFIG_7
0x0011C01C
MCAN15_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
VOUT0_DATA222O
GPMC0_A186OZ
GPIO0_77IO
I2C5_SCL8IOD
TRC_DATA2110O
UART9_RXD11I
AE33 MCAN16_RXPADCFG:
PADCONFIG_10
0x0011C028
MCAN16_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
VOUT0_DATA192O
GPMC0_A156OZ
GPIO0_107IO
SPI0_CS38IO
TRC_DATA2410O
GPMC0_WAIT112I
AH34 MCAN16_TXPADCFG:
PADCONFIG_9
0x0011C024
MCAN16_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
VOUT0_DATA202O
GPMC0_A166OZ
GPIO0_97IO
SPI1_CS38IO
TRC_DATA2310O
I2C1_SDA12IOD
AK35 MCASP0_ACLKXPADCFG:
PADCONFIG_14
0x0011C038
MCAN5_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_ACLKX1IO
VOUT0_DATA152O
GPMC0_AD06IO
GPIO0_147IO
EHRPWM_TZn_IN29I
UART8_RXD11I
AK38 MCASP0_AFSXPADCFG:
PADCONFIG_15
0x0011C03C
MCAN5_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AFSX1IO
VOUT0_DATA142O
GPMC0_AD16IO
GPIO0_157IO
EHRPWM2_B9IO
UART8_TXD11O
AC34 MCASP1_ACLKXPADCFG:
PADCONFIG_46
0x0011C0B8
MCAN10_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP1_ACLKX1IO
DP0_HPD3I
PCIE0_CLKREQn4IO
GPMC0_A115OZ
RGMII1_RD06I
GPIO0_467IO
EQEP0_S9IO
UART4_RTSn11O
SPI3_CS312IO
UART9_RTSn13O
AD33 MCASP1_AFSXPADCFG:
PADCONFIG_47
0x0011C0BC
MCAN11_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP1_AFSX1IO
GPMC0_A125OZ
MDIO0_MDIO6IO
GPIO0_477IO
SPI3_CS08IO
EQEP0_I9IO
UART0_RXD11I
AD37 MCASP2_ACLKXPADCFG:
PADCONFIG_21
0x0011C054
MCAN8_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP2_ACLKX1IO
VOUT0_DATA82O
VOUT0_DATA205O
GPMC0_AD106IO
GPIO0_217IO
SPI5_CS28IO
EQEP2_S9IO
TRC_DATA410O
UART1_RXD11I
SPI7_CS113IO
SYNC3_OUT14O
AE37 MCASP2_AFSXPADCFG:
PADCONFIG_22
0x0011C058
MCAN9_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP2_AFSX1IO
VOUT0_DATA72O
MDIO1_MDC4O
GPMC0_AD116IO
GPIO0_227IO
SPI5_CS38IO
EHRPWM_SOCA9O
TRC_DATA910O
UART1_TXD11O
SPI7_CS213IO
AF37 MCASP0_AXR0PADCFG:
PADCONFIG_16
0x0011C040
MCAN6_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR01IO
VOUT0_DATA132O
GPMC0_AD26IO
GPIO0_167IO
SPI2_CS28IO
EHRPWM2_A9IO
TRC_DATA1410O
UART4_RXD11I
SPI7_CLK13IO
UART8_CTSn14I
AG37 MCASP0_AXR1PADCFG:
PADCONFIG_17
0x0011C044
MCAN6_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR11IO
VOUT0_DATA122O
OBSCLK14O
GPMC0_AD36IO
GPIO0_177IO
SPI2_CS38IO
EHRPWM0_SYNCO9O
TRC_DATA1210O
UART4_TXD11O
SPI7_CS013IO
UART8_RTSn14O
AK33 MCASP0_AXR2PADCFG:
PADCONFIG_18
0x0011C048
MCAN7_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR21IO
VOUT0_DATA112O
GPMC0_ADVn_ALE6O
GPIO0_187IO
EQEP2_A9I
TRC_DATA1010O
UART4_CTSn11I
GPMC0_WPn12O
UART9_CTSn13I
AJ38 MCASP0_AXR3PADCFG:
PADCONFIG_31
0x0011C07C
MCAN3_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR31IO
VOUT0_DATA22O
GPMC0_BE1n6O
GPIO0_317IO
SPI5_CLK8IO
EHRPWM_TZn_IN09I
TRC_DATA710O
UART3_CTSn11I
SPI3_CS112IO
SPI7_D113IO
AK34 MCASP0_AXR4PADCFG:
PADCONFIG_32
0x0011C080
MCAN3_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR41IO
VOUT0_HSYNC2O
VOUT0_VP0_HSYNC4O
VOUT0_VP2_HSYNC5O
GPMC0_OEn_REn6O
GPIO0_327IO
SPI6_CS28IO
EHRPWM5_B9IO
TRC_DATA1810O
I2C4_SDA13IOD
AG38 MCASP0_AXR5PADCFG:
PADCONFIG_33
0x0011C084
MCAN4_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR51IO
VOUT0_DE2O
MCASP1_ACLKR3IO
VOUT0_VP0_DE4O
VOUT0_VP2_DE5O
GPMC0_CSn06O
GPIO0_337IO
SPI6_CS38IO
EHRPWM5_A9IO
TRC_DATA1910O
I2C4_SCL13IOD
AF36 MCASP0_AXR6PADCFG:
PADCONFIG_34
0x0011C088
MCAN4_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR61IO
VOUT0_VSYNC2O
MCASP1_AFSR3IO
VOUT0_VP0_VSYNC4O
VOUT0_VP2_VSYNC5O
GPMC0_CLKOUT6O
GPIO0_347IO
SPI3_CS28IO
EHRPWM_TZn_IN49I
TRC_DATA2010O
SPI5_D111IO
GPMC0_FCLK_MUX12O
AE35 MCASP0_AXR7PADCFG:
PADCONFIG_35
0x0011C08C
MCAN5_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR71IO
MCASP4_ACLKR3IO
GPMC0_A05OZ
RGMII1_TD06O
GPIO0_357IO
GPMC0_A148OZ
EHRPWM3_A9IO
UART4_RXD11I
GPMC0_CSn212O
USB0_DRVVBUS14O
AC35 MCASP0_AXR8PADCFG:
PADCONFIG_36
0x0011C090
MCAN5_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR81IO
MCASP4_AFSR3IO
GPMC0_A15OZ
RGMII1_TD16O
GPIO0_367IO
RMII1_RXD08I
EHRPWM_TZn_IN39I
UART4_TXD11O
AG35 MCASP0_AXR9PADCFG:
PADCONFIG_37
0x0011C094
MCAN6_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR91IO
MCASP4_AXR42IO
GPMC0_A25OZ
RGMII1_TD26O
GPIO0_377IO
RMII1_RXD18I
EHRPWM3_SYNCO9O
UART4_CTSn11I
AH36 MCASP0_AXR10PADCFG:
PADCONFIG_38
0x0011C098
MCAN6_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR101IO
GPMC0_A35OZ
RGMII1_TD36O
GPIO0_387IO
RMII1_CRS_DV8I
EHRPWM3_SYNCI9I
UART4_RTSn11O
AF35 MCASP0_AXR11PADCFG:
PADCONFIG_39
0x0011C09C
MCAN7_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR111IO
DSS_FSYNC24O
GPMC0_A45OZ
RGMII1_TX_CTL6O
GPIO0_397IO
RMII1_RX_ER8I
EHRPWM3_B9IO
SPI2_CS110IO
UART5_RXD11I
AD34 MCASP0_AXR12PADCFG:
PADCONFIG_40
0x0011C0A0
MCAN7_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR121IO
MCASP2_ACLKR3IO
DSS_FSYNC34O
GPMC0_A55OZ
RGMII1_RD16I
GPIO0_407IO
RMII1_TXD08O
EHRPWM_SOCB9O
SPI2_CLK10IO
UART5_TXD11O
AJ36 MCASP0_AXR13PADCFG:
PADCONFIG_41
0x0011C0A4
MCAN8_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR131IO
MCASP2_AFSR3IO
GPMC0_A65OZ
RGMII1_RD26I
GPIO0_417IO
RMII_REF_CLK8I
EHRPWM4_A9IO
SPI2_CS010IO
UART5_CTSn11I
UART7_RXD13I
AF34 MCASP0_AXR14PADCFG:
PADCONFIG_42
0x0011C0A8
MCAN8_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR141IO
MCASP2_AXR42IO
MCASP0_ACLKR3IO
GPMC0_A75OZ
RGMII1_RD36I
GPIO0_427IO
CLKOUT8IO
EQEP0_A9I
SPI2_D010IO
UART5_RTSn11O
UART7_TXD13O
AE34 MCASP0_AXR15PADCFG:
PADCONFIG_43
0x0011C0AC
MCAN9_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP0_AXR151IO
MCASP0_AFSR3IO
GPMC0_A85OZ
RGMII1_RX_CTL6I
GPIO0_437IO
RMII1_TX_EN8O
EQEP0_B9I
SPI2_D110IO
UART8_RXD11I
I2C1_SCL13IOD
AD38 MCASP1_AXR0PADCFG:
PADCONFIG_48
0x0011C0C0
MCAN11_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP1_AXR01IO
GPMC0_A135OZ
MDIO0_MDC6O
GPIO0_487IO
SPI3_CLK8IO
EQEP1_S9IO
UART0_TXD11O
GPMC0_WAIT312I
SYNC2_OUT14O
AC32 MCASP1_AXR1PADCFG:
PADCONFIG_19
0x0011C04C
MCAN7_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP1_AXR11IO
VOUT0_DATA102O
GPMC0_AD86IO
GPIO0_197IO
SPI3_D08IO
EHRPWM_TZn_IN19I
TRC_DATA810O
UART0_CTSn11I
UART9_RXD12I
I2C2_SCL13IOD
AC37 MCASP1_AXR2PADCFG:
PADCONFIG_20
0x0011C050
MCAN8_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP1_AXR21IO
VOUT0_DATA92O
VOUT0_DATA215O
GPMC0_AD96IO
GPIO0_207IO
SPI3_D18IO
EQEP2_B9I
TRC_DATA610O
UART0_RTSn11O
UART9_TXD12O
I2C2_SDA13IOD
AL33 MCASP1_AXR3PADCFG:
PADCONFIG_44
0x0011C0B0
MCAN9_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP1_AXR31IO
PCIE2_CLKREQn4IO
GPMC0_A95OZ
RGMII1_RXC6I
GPIO0_447IO
RMII1_TXD18O
EQEP1_A9I
UART8_TXD11O
I2C1_SDA13IOD
AL34 MCASP1_AXR4PADCFG:
PADCONFIG_45
0x0011C0B4
MCAN10_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP1_AXR41IO
PCIE3_CLKREQn4IO
GPMC0_A105OZ
RGMII1_TXC6O
GPIO0_457IO
EQEP1_B9I
UART4_RXD11I
AC36 MCASP2_AXR0PADCFG:
PADCONFIG_23
0x0011C05C
MCAN9_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP2_AXR01IO
VOUT0_DATA62O
MDIO1_MDIO4IO
GPMC0_AD126IO
GPIO0_237IO
EQEP2_I9IO
TRC_DATA1510O
UART1_CTSn11I
UART6_RXD12I
AE36 MCASP2_AXR1PADCFG:
PADCONFIG_24
0x0011C060
MCAN17_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS Yes
MCASP2_AXR11IO
VOUT0_DATA52O
GPMC0_AD136IO
GPIO0_247IO
EHRPWM1_A9IO
TRC_DATA1310O
UART1_RTSn11O
UART6_TXD12O
I2C3_SDA13IOD
U35MCU_ADC0_REFNMCU_ADC0_REFNA1.8 VVDDA_ADC0ADC12BNo
R35MCU_ADC0_REFPMCU_ADC0_REFPA1.8 VVDDA_ADC0ADC12BNo
W35MCU_ADC1_REFNMCU_ADC1_REFNA1.8 VVDDA_ADC1ADC12BNo
AA35MCU_ADC1_REFPMCU_ADC1_REFPA1.8 VVDDA_ADC1ADC12BNo
P36 MCU_ADC0_AIN0PADCFG:
WKUP_PADCONFIG_77
0x4301C134
WKUP_GPIO0_71- (1)I1.8 V 0 VDDA_ADC0 ADC12B No
MCU_ADC0_AIN00A
V36 MCU_ADC0_AIN1PADCFG:
WKUP_PADCONFIG_78
0x4301C138
WKUP_GPIO0_72- (1)I1.8 V 0 VDDA_ADC0 ADC12B No
MCU_ADC0_AIN10A
T34 MCU_ADC0_AIN2PADCFG:
WKUP_PADCONFIG_79
0x4301C13C
WKUP_GPIO0_73- (1)I1.8 V 0 VDDA_ADC0 ADC12B No
MCU_ADC0_AIN20A
T36 MCU_ADC0_AIN3PADCFG:
WKUP_PADCONFIG_80
0x4301C140
WKUP_GPIO0_74- (1)I1.8 V 0 VDDA_ADC0 ADC12B No
MCU_ADC0_AIN30A
P34 MCU_ADC0_AIN4PADCFG:
WKUP_PADCONFIG_81
0x4301C144
WKUP_GPIO0_75- (1)I1.8 V 0 VDDA_ADC0 ADC12B No
MCU_ADC0_AIN40A
R37 MCU_ADC0_AIN5PADCFG:
WKUP_PADCONFIG_82
0x4301C148
WKUP_GPIO0_76- (1)I1.8 V 0 VDDA_ADC0 ADC12B No
MCU_ADC0_AIN50A
R33 MCU_ADC0_AIN6PADCFG:
WKUP_PADCONFIG_83
0x4301C14C
WKUP_GPIO0_77- (1)I1.8 V 0 VDDA_ADC0 ADC12B No
MCU_ADC0_AIN60A
V38 MCU_ADC0_AIN7PADCFG:
WKUP_PADCONFIG_84
0x4301C150
WKUP_GPIO0_78- (1)I1.8 V 0 VDDA_ADC0 ADC12B No
MCU_ADC0_AIN70A
Y38 MCU_ADC1_AIN0PADCFG:
WKUP_PADCONFIG_85
0x4301C154
WKUP_GPIO0_79- (1)I1.8 V 0 VDDA_ADC1 ADC12B No
MCU_ADC1_AIN00A
Y34 MCU_ADC1_AIN1PADCFG:
WKUP_PADCONFIG_86
0x4301C158
WKUP_GPIO0_80- (1)I1.8 V 0 VDDA_ADC1 ADC12B No
MCU_ADC1_AIN10A
V34 MCU_ADC1_AIN2PADCFG:
WKUP_PADCONFIG_87
0x4301C15C
WKUP_GPIO0_81- (1)I1.8 V 0 VDDA_ADC1 ADC12B No
MCU_ADC1_AIN20A
W37 MCU_ADC1_AIN3PADCFG:
WKUP_PADCONFIG_88
0x4301C160
WKUP_GPIO0_82- (1)I1.8 V 0 VDDA_ADC1 ADC12B No
MCU_ADC1_AIN30A
AA37 MCU_ADC1_AIN4PADCFG:
WKUP_PADCONFIG_89
0x4301C164
WKUP_GPIO0_83- (1)I1.8 V 0 VDDA_ADC1 ADC12B No
MCU_ADC1_AIN40A
W33 MCU_ADC1_AIN5PADCFG:
WKUP_PADCONFIG_90
0x4301C168
WKUP_GPIO0_84- (1)I1.8 V 0 VDDA_ADC1 ADC12B No
MCU_ADC1_AIN50A
U33 MCU_ADC1_AIN6PADCFG:
WKUP_PADCONFIG_91
0x4301C16C
WKUP_GPIO0_85- (1)I1.8 V 0 VDDA_ADC1 ADC12B No
MCU_ADC1_AIN60A
Y36 MCU_ADC1_AIN7PADCFG:
WKUP_PADCONFIG_92
0x4301C170
WKUP_GPIO0_86- (1)I1.8 V 0 VDDA_ADC1 ADC12B No
MCU_ADC1_AIN70A
M35 MCU_I2C0_SCLPADCFG:
WKUP_PADCONFIG_66
0x4301C108
MCU_I2C0_SCL0IOD1.8 V/3.3 V Off / Off / Off On / SS / Off 0 VDDSHV0_MCU Yes I2C OPEN DRAIN Yes
WKUP_GPIO0_657IO
G34 MCU_I2C0_SDAPADCFG:
WKUP_PADCONFIG_67
0x4301C10C
MCU_I2C0_SDA0IOD1.8 V/3.3 V Off / Off / Off On / SS / Off 0 VDDSHV0_MCU Yes I2C OPEN DRAIN Yes
WKUP_GPIO0_877IO
F38 MCU_MCAN0_RXPADCFG:
WKUP_PADCONFIG_47
0x4301C0BC
MCU_MCAN0_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_GPIO0_617IO
K33 MCU_MCAN0_TXPADCFG:
WKUP_PADCONFIG_46
0x4301C0B8
MCU_MCAN0_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_GPIO0_607IO
A36 MCU_MDIO0_MDCPADCFG:
WKUP_PADCONFIG_39
0x4301C09C
MCU_MDIO0_MDC0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
WKUP_GPIO0_537IO
B35 MCU_MDIO0_MDIOPADCFG:
WKUP_PADCONFIG_38
0x4301C098
MCU_MDIO0_MDIO0IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
WKUP_GPIO0_527IO
E32 MCU_OSPI0_CLKPADCFG:
WKUP_PADCONFIG_0
0x4301C000
MCU_OSPI0_CLK0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_CK1O
WKUP_GPIO0_167IO
C34 MCU_OSPI0_DQSPADCFG:
WKUP_PADCONFIG_2
0x4301C008
MCU_OSPI0_DQS0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_RWDS1IO
WKUP_GPIO0_187IO
D32 MCU_OSPI0_LBCLKOPADCFG:
WKUP_PADCONFIG_1
0x4301C004
MCU_OSPI0_LBCLKO0IO1.8 V/3.3 V Off / Off / Off On / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_CKn1O
WKUP_GPIO0_177IO
F32 MCU_OSPI1_CLKPADCFG:
WKUP_PADCONFIG_16
0x4301C040
MCU_OSPI1_CLK0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
WKUP_GPIO0_317IO
F31 MCU_OSPI1_DQSPADCFG:
WKUP_PADCONFIG_18
0x4301C048
MCU_OSPI1_DQS0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_OSPI0_CSn31O
MCU_HYPERBUS0_INTn2I
MCU_OSPI0_ECC_FAIL6I
WKUP_GPIO0_337IO
C31 MCU_OSPI1_LBCLKOPADCFG:
WKUP_PADCONFIG_17
0x4301C044
MCU_OSPI1_LBCLKO0IO1.8 V/3.3 V Off / Off / Off On / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_OSPI0_CSn21O
MCU_HYPERBUS0_RESETOn2I
MCU_OSPI0_RESET_OUT06O
WKUP_GPIO0_327IO
A32 MCU_OSPI0_CSn0PADCFG:
WKUP_PADCONFIG_11
0x4301C02C
MCU_OSPI0_CSn00O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_CSn01O
WKUP_GPIO0_277IO
A33 MCU_OSPI0_CSn1PADCFG:
WKUP_PADCONFIG_12
0x4301C030
MCU_OSPI0_CSn10O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_RESETn1O
WKUP_GPIO0_287IO
B34 MCU_OSPI0_CSn2PADCFG:
WKUP_PADCONFIG_14
0x4301C038
MCU_OSPI0_CSn20O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_OSPI0_CSn21O
MCU_HYPERBUS0_RESETOn2I
MCU_HYPERBUS0_WPn3O
MCU_HYPERBUS0_CSn14O
MCU_OSPI0_RESET_OUT06O
WKUP_GPIO0_297IO
C32 MCU_OSPI0_CSn3PADCFG:
WKUP_PADCONFIG_15
0x4301C03C
MCU_OSPI0_CSn30O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_OSPI0_CSn31O
MCU_HYPERBUS0_INTn2I
MCU_HYPERBUS0_WPn3O
MCU_OSPI0_RESET_OUT15O
MCU_OSPI0_ECC_FAIL6I
WKUP_GPIO0_307IO
B33 MCU_OSPI0_D0PADCFG:
WKUP_PADCONFIG_3
0x4301C00C
MCU_OSPI0_D00IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_DQ01IO
WKUP_GPIO0_197IO
BOOTMODE00BOOTSTRAPI
B32 MCU_OSPI0_D1PADCFG:
WKUP_PADCONFIG_4
0x4301C010
MCU_OSPI0_D10IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_DQ11IO
WKUP_GPIO0_207IO
BOOTMODE01BOOTSTRAPI
C33 MCU_OSPI0_D2PADCFG:
WKUP_PADCONFIG_5
0x4301C014
MCU_OSPI0_D20IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_DQ21IO
WKUP_GPIO0_217IO
C35 MCU_OSPI0_D3PADCFG:
WKUP_PADCONFIG_6
0x4301C018
MCU_OSPI0_D30IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_DQ31IO
WKUP_GPIO0_227IO
D33 MCU_OSPI0_D4PADCFG:
WKUP_PADCONFIG_7
0x4301C01C
MCU_OSPI0_D40IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_DQ41IO
WKUP_GPIO0_237IO
BOOTMODE02BOOTSTRAPI
D34 MCU_OSPI0_D5PADCFG:
WKUP_PADCONFIG_8
0x4301C020
MCU_OSPI0_D50IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_DQ51IO
WKUP_GPIO0_247IO
BOOTMODE03BOOTSTRAPI
E34 MCU_OSPI0_D6PADCFG:
WKUP_PADCONFIG_9
0x4301C024
MCU_OSPI0_D60IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_DQ61IO
WKUP_GPIO0_257IO
E33 MCU_OSPI0_D7PADCFG:
WKUP_PADCONFIG_10
0x4301C028
MCU_OSPI0_D70IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_DQ71IO
WKUP_GPIO0_267IO
G32 MCU_OSPI1_CSn0PADCFG:
WKUP_PADCONFIG_23
0x4301C05C
MCU_OSPI1_CSn00O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
WKUP_GPIO0_387IO
G33 MCU_OSPI1_CSn1PADCFG:
WKUP_PADCONFIG_24
0x4301C060
MCU_OSPI1_CSn10O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_HYPERBUS0_WPn1O
MCU_TIMER_IO02IO
MCU_HYPERBUS0_CSn13O
MCU_UART0_RTSn4O
MCU_SPI0_CS25IO
MCU_OSPI0_RESET_OUT16O
WKUP_GPIO0_397IO
E35 MCU_OSPI1_D0PADCFG:
WKUP_PADCONFIG_19
0x4301C04C
MCU_OSPI1_D00IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
WKUP_GPIO0_347IO
D31 MCU_OSPI1_D1PADCFG:
WKUP_PADCONFIG_20
0x4301C050
MCU_OSPI1_D10IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_UART0_RXD4I
MCU_SPI1_CS15IO
WKUP_GPIO0_357IO
G31 MCU_OSPI1_D2PADCFG:
WKUP_PADCONFIG_21
0x4301C054
MCU_OSPI1_D20IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_UART0_TXD4O
MCU_SPI1_CS25IO
WKUP_GPIO0_367IO
F33 MCU_OSPI1_D3PADCFG:
WKUP_PADCONFIG_22
0x4301C058
MCU_OSPI1_D30IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV1_MCU Yes LVCMOS No
MCU_UART0_CTSn4I
MCU_SPI0_CS15IO
WKUP_GPIO0_377IO
K32MCU_PORzMCU_PORzI1.8 VVDDA_WKUPYesFS_RESETNo
F36 MCU_RESETSTATzPADCFG:
WKUP_PADCONFIG_71
0x4301C11C
MCU_RESETSTATz0O1.8 V/3.3 V Off / Low / Off Off / SS / Off 0 PU/PD VDDSHV0_MCU Yes LVCMOS No
WKUP_GPIO0_687IO
G36MCU_RESETzPADCFG:
WKUP_PADCONFIG_70
0x4301C118
MCU_RESETz0I1.8 V/3.3 VOn / NA / UpOn / Off / Up0PU/PDVDDSHV0_MCUYesLVCMOSNo
B37 MCU_RGMII1_RXCPADCFG:
WKUP_PADCONFIG_33
0x4301C084
MCU_RGMII1_RXC0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_RMII1_REF_CLK1I
WKUP_GPIO0_477IO
C37 MCU_RGMII1_RX_CTLPADCFG:
WKUP_PADCONFIG_27
0x4301C06C
MCU_RGMII1_RX_CTL0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_RMII1_RX_ER1I
WKUP_GPIO0_417IO
E36 MCU_RGMII1_TXCPADCFG:
WKUP_PADCONFIG_32
0x4301C080
MCU_RGMII1_TXC0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_RMII1_TX_EN1O
WKUP_GPIO0_467IO
C38 MCU_RGMII1_TX_CTLPADCFG:
WKUP_PADCONFIG_26
0x4301C068
MCU_RGMII1_TX_CTL0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_RMII1_CRS_DV1I
WKUP_GPIO0_407IO
A35 MCU_RGMII1_RD0PADCFG:
WKUP_PADCONFIG_37
0x4301C094
MCU_RGMII1_RD00I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_RMII1_RXD01I
WKUP_GPIO0_517IO
B36 MCU_RGMII1_RD1PADCFG:
WKUP_PADCONFIG_36
0x4301C090
MCU_RGMII1_RD10I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_RMII1_RXD11I
WKUP_GPIO0_507IO
C36 MCU_RGMII1_RD2PADCFG:
WKUP_PADCONFIG_35
0x4301C08C
MCU_RGMII1_RD20I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_TIMER_IO51IO
WKUP_GPIO0_627IO
D36 MCU_RGMII1_RD3PADCFG:
WKUP_PADCONFIG_34
0x4301C088
MCU_RGMII1_RD30I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_TIMER_IO41IO
WKUP_GPIO0_487IO
D37 MCU_RGMII1_TD0PADCFG:
WKUP_PADCONFIG_31
0x4301C07C
MCU_RGMII1_TD00O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_RMII1_TXD01O
WKUP_GPIO0_457IO
D38 MCU_RGMII1_TD1PADCFG:
WKUP_PADCONFIG_30
0x4301C078
MCU_RGMII1_TD10O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_RMII1_TXD11O
WKUP_GPIO0_447IO
E37 MCU_RGMII1_TD2PADCFG:
WKUP_PADCONFIG_29
0x4301C074
MCU_RGMII1_TD20O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_TIMER_IO31IO
MCU_ADC_EXT_TRIGGER13I
WKUP_GPIO0_437IO
E38 MCU_RGMII1_TD3PADCFG:
WKUP_PADCONFIG_28
0x4301C070
MCU_RGMII1_TD30O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2_MCU Yes LVCMOS No
MCU_TIMER_IO21IO
MCU_ADC_EXT_TRIGGER03I
WKUP_GPIO0_427IO
N36MCU_SAFETY_ERRORnPADCFG:
WKUP_PADCONFIG_69
0x4301C114
MCU_SAFETY_ERRORn0IO1.8 VOff / Off / DownOn / SS / Down0PU/PDVDDA_WKUPYesLVCMOSNo
G38 MCU_SPI0_CLKPADCFG:
WKUP_PADCONFIG_40
0x4301C0A0
MCU_SPI0_CLK0IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_GPIO0_547IO
MCU_BOOTMODE00BOOTSTRAPI
F37 MCU_SPI0_CS0PADCFG:
WKUP_PADCONFIG_43
0x4301C0AC
MCU_SPI0_CS00IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_TIMER_IO14IO
WKUP_GPIO0_707IO
H36 MCU_SPI0_D0PADCFG:
WKUP_PADCONFIG_41
0x4301C0A4
MCU_SPI0_D00IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_GPIO0_557IO
MCU_BOOTMODE01BOOTSTRAPI
J38 MCU_SPI0_D1PADCFG:
WKUP_PADCONFIG_42
0x4301C0A8
MCU_SPI0_D10IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_TIMER_IO04IO
WKUP_GPIO0_697IO
MCU_BOOTMODE02BOOTSTRAPI
AJ7MMC0_CALPADMMC0_CALPADA1.8 VPU/PDVDDS_MMC0eMMCPHYNo
AK5MMC0_CLKMMC0_CLKO1.8 VOn / Low / OffOn / SS / OffPU/PDVDDS_MMC0eMMCPHYNo
AL8MMC0_CMDMMC0_CMDIO1.8 VOn / High / OffOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AK4MMC0_DSMMC0_DSIO1.8 VOn / Off / DownOn / Off / DownPU/PDVDDS_MMC0eMMCPHYNo
AB38 MMC1_CLKPADCFG:
PADCONFIG_65
0x0011C104
MMC1_CLK0IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV5 Yes SDIO No
UART8_RXD1I
TIMER_IO63IO
EHRPWM2_B4IO
UART4_CTSn5I
EHRPWM5_A6IO
GPIO0_647IO
SPI1_CLK8IO
UART0_RTSn9O
I2C6_SDA10IOD
MCAN15_TX11O
PCIE2_CLKREQn12IO
AB36 MMC1_CMDPADCFG:
PADCONFIG_66
0x0011C108
MMC1_CMD0IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV5 Yes SDIO No
UART8_TXD1O
TIMER_IO73IO
EHRPWM2_A4IO
UART4_RTSn5O
GPIO0_657IO
SPI1_D18IO
I2C6_SCL10IOD
MCAN15_RX11I
PCIE3_CLKREQn12IO
AK9MMC0_DAT0MMC0_DAT0IO1.8 VOn / Off / UpOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AL6MMC0_DAT1MMC0_DAT1IO1.8 VOn / Off / UpOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AK8MMC0_DAT2MMC0_DAT2IO1.8 VOn / Off / UpOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AK6MMC0_DAT3MMC0_DAT3IO1.8 VOn / Off / UpOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AK7MMC0_DAT4MMC0_DAT4IO1.8 VOn / Off / UpOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AL7MMC0_DAT5MMC0_DAT5IO1.8 VOn / Off / UpOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AL5MMC0_DAT6MMC0_DAT6IO1.8 VOn / Off / UpOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AK3MMC0_DAT7MMC0_DAT7IO1.8 VOn / Off / UpOn / SS / UpPU/PDVDDS_MMC0eMMCPHYNo
AA33 MMC1_DAT0PADCFG:
PADCONFIG_63
0x0011C0FC
MMC1_DAT00IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV5 Yes SDIO No
UART7_RTSn1O
ECAP1_IN_APWM_OUT2IO
TIMER_IO53IO
EHRPWM1_A4IO
UART4_TXD5O
GPIO0_637IO
SPI1_D08IO
UART5_RTSn9O
I2C4_SCL10IOD
UART2_TXD11O
AB34 MMC1_DAT1PADCFG:
PADCONFIG_62
0x0011C0F8
MMC1_DAT10IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV5 Yes SDIO No
UART7_CTSn1I
ECAP0_IN_APWM_OUT2IO
TIMER_IO43IO
EHRPWM1_B4IO
UART4_RXD5I
EHRPWM4_A6IO
GPIO0_627IO
SPI1_CS28IO
UART5_CTSn9I
I2C4_SDA10IOD
UART2_RXD11I
AA32 MMC1_DAT2PADCFG:
PADCONFIG_61
0x0011C0F4
MMC1_DAT20IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV5 Yes SDIO No
UART7_TXD1O
TIMER_IO33IO
EHRPWM0_A4IO
GPIO0_617IO
SPI1_CS18IO
CPTS0_TS_SYNC9O
I2C3_SDA10IOD
UART5_TXD11O
AC38 MMC1_DAT3PADCFG:
PADCONFIG_60
0x0011C0F0
MMC1_DAT30IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV5 Yes SDIO No
UART7_RXD1I
PCIE1_CLKREQn2IO
TIMER_IO23IO
EHRPWM0_B4IO
EHRPWM3_A6IO
GPIO0_607IO
SPI1_CS08IO
UART0_CTSn9I
I2C3_SCL10IOD
UART5_RXD11I
P38OSC1_XIOSC1_XII1.8 VVDDA_OSC1YesHFXOSC
N37OSC1_XOOSC1_XOO1.8 VVDDA_OSC1YesHFXOSC
AP4PCIE_REFCLK0_N_OUTPCIE_REFCLK0_N_OUTO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AP5PCIE_REFCLK0_P_OUTPCIE_REFCLK0_P_OUTO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AN8PCIE_REFCLK1_N_OUTPCIE_REFCLK1_N_OUTO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AN9PCIE_REFCLK1_P_OUTPCIE_REFCLK1_P_OUTO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AN5PCIE_REFCLK2_N_OUTPCIE_REFCLK2_N_OUTO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AN6PCIE_REFCLK2_P_OUTPCIE_REFCLK2_P_OUTO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AP7PCIE_REFCLK3_N_OUTPCIE_REFCLK3_N_OUTO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AP8PCIE_REFCLK3_P_OUTPCIE_REFCLK3_P_OUTO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
L38 PMIC_POWER_EN1PADCFG:
WKUP_PADCONFIG_68
0x4301C110
PMIC_POWER_EN10O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_I3C0_SDAPULLEN5OD
WKUP_GPIO0_887IO
AJ34 PMIC_WAKE0nPADCFG:
PADCONFIG_13
0x0011C034
PMIC_WAKE0n0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV2 Yes LVCMOS No
MCASP4_AXR01IO
DSS_FSYNC14O
MCAN17_RX5I
GPMC0_WEn6O
GPIO0_137IO
SPI6_CS08IO
TRC_DATA010O
UART9_RTSn11O
UART7_TXD13O
AUDIO_EXT_REFCLK014IO
P33PORzPADCFG:
WKUP_PADCONFIG_94
0x4301C178
PORz0I1.8 V0VDDA_WKUPYesFS_RESETNo
AL38RESETSTATzPADCFG:
PADCONFIG_67
0x0011C10C
RESETSTATz0O1.8 V/3.3 VOff / Low / OffOff / SS / Off0PU/PDVDDSHV0YesLVCMOSNo
F34RESET_REQzPADCFG:
WKUP_PADCONFIG_93
0x4301C174
RESET_REQz0I1.8 V/3.3 VOn / Off / UpOn / Off / Up0PU/PDVDDSHV0_MCUYesLVCMOSNo
AU9SERDES0_REFCLK_NSERDES0_REFCLK_NIO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AU8SERDES0_REFCLK_PSERDES0_REFCLK_PIO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AN11SERDES0_REXTSERDES0_REXTI1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AV3SERDES1_REFCLK_NSERDES1_REFCLK_N0IO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AV4SERDES1_REFCLK_PSERDES1_REFCLK_P0IO1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AL9SERDES1_REXTSERDES1_REXT0I1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AV21SERDES2_REFCLK_NSERDES2_REFCLK_NIO1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AV22SERDES2_REFCLK_PSERDES2_REFCLK_PIO1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AL20SERDES2_REXTSERDES2_REXT0IO1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AV16SERDES4_REFCLK_NSERDES4_REFCLK_NIO1.8 VVDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES44L_PHY
AV15SERDES4_REFCLK_PSERDES4_REFCLK_PIO1.8 VVDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES44L_PHY
AM19SERDES4_REXTSERDES4_REXTIO1.8 VVDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES44L_PHY
AR8SERDES0_RX0_NPCIE1_RXN0I1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AR9SERDES0_RX0_PPCIE1_RXP01I1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AT10SERDES0_RX1_NPCIE1_RXN11I1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AT11SERDES0_RX1_PPCIE1_RXP1I1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AR11 SERDES0_RX2_N PCIE1_RXN2I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE3_RXN0I
USB0_SSRX1NI
AR12 SERDES0_RX2_P PCIE3_RXP0I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE1_RXP2I
USB0_SSRX1PI
AU11 SERDES0_RX3_N USB0_SSRX2NI1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE3_RXN1I
PCIE1_RXN3I
AU12 SERDES0_RX3_P PCIE3_RXP1I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE1_RXP3I
USB0_SSRX2PI
AT7SERDES0_TX0_NPCIE1_TXN01O1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AT8SERDES0_TX0_PPCIE1_TXP01O1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AP10SERDES0_TX1_NPCIE1_TXN11O1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AP11SERDES0_TX1_PPCIE1_TXP11O1.8 VVDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_14L_PHY
AV9 SERDES0_TX2_N PCIE1_TXN21O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
USB0_SSTX1N2O
PCIE3_TXN03O
AV10 SERDES0_TX2_P PCIE1_TXP21O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
USB0_SSTX1P2O
PCIE3_TXP03O
AV12 SERDES0_TX3_N USB0_SSTX2NO1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE3_TXN1O
PCIE1_TXN3O
AV13 SERDES0_TX3_P USB0_SSTX2PO1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE3_TXP1O
PCIE1_TXP3O
AU5 SERDES1_RX0_N PCIE0_RXN0I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
SGMII3_RXN0I
AU6 SERDES1_RX0_P PCIE0_RXP0I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
SGMII3_RXP0I
AT4 SERDES1_RX1_N SGMII4_RXN0I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE0_RXN1I
AT5 SERDES1_RX1_P SGMII4_RXP0I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE0_RXP1I
AU2 SERDES1_RX2_N PCIE2_RXN0I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE0_RXN2I
SGMII1_RXN0I
AU3 SERDES1_RX2_P SGMII1_RXP0I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE2_RXP0I
PCIE0_RXP2I
AT1 SERDES1_RX3_N PCIE0_RXN3I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE2_RXN1I
SGMII2_RXN0I
AT2 SERDES1_RX3_P PCIE0_RXP3I1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
SGMII2_RXP0I
PCIE2_RXP1I
AV6 SERDES1_TX0_N SGMII3_TXN0O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE0_TXN0O
AV7 SERDES1_TX0_P PCIE0_TXP0O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
SGMII3_TXP0O
AR5 SERDES1_TX1_N PCIE0_TXN1O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
SGMII4_TXN0O
AR6 SERDES1_TX1_P PCIE0_TXP1O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
SGMII4_TXP0O
AR2 SERDES1_TX2_N PCIE0_TXN2O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
SGMII1_TXN0O
PCIE2_TXN0O
AR3 SERDES1_TX2_P PCIE2_TXP0O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
SGMII1_TXP0O
PCIE0_TXP2O
AP1 SERDES1_TX3_N PCIE2_TXN1O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE0_TXN3O
SGMII2_TXN0O
AP2 SERDES1_TX3_P SGMII2_TXP0O1.8 V VDDA_0P8_SERDES0_1 / VDDA_0P8_SERDES_C0_1 / VDDA_1P8_SERDES0_1 4L_PHY
PCIE0_TXP3O
PCIE2_TXP1O
AU23SERDES2_RX0_NSGMII5_RXN00I1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AU24SERDES2_RX0_PSGMII5_RXP00I1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AT22SERDES2_RX1_NSGMII6_RXN00I1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AT23SERDES2_RX1_PSGMII6_RXP00I1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AU20 SERDES2_RX2_N SGMII7_RXN00I1.8 V VDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES2 4L_PHY
SGMII1_RXN01I
AU21 SERDES2_RX2_P SGMII7_RXP00I1.8 V VDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES2 4L_PHY
SGMII1_RXP01I
AT19 SERDES2_RX3_N SGMII8_RXN00I1.8 V VDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES2 4L_PHY
SGMII2_RXN01I
AT20 SERDES2_RX3_P SGMII8_RXP00I1.8 V VDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES2 4L_PHY
SGMII2_RXP01I
AV24SERDES2_TX0_NSGMII5_TXN00O1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AV25SERDES2_TX0_PSGMII5_TXP00O1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AR23SERDES2_TX1_NSGMII6_TXN00O1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AR24SERDES2_TX1_PSGMII6_TXP00O1.8 VVDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES24L_PHY
AR20 SERDES2_TX2_N SGMII7_TXN00O1.8 V VDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES2 4L_PHY
SGMII1_TXN01O
AR21 SERDES2_TX2_P SGMII7_TXP0O1.8 V VDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES2 4L_PHY
SGMII1_TXP0O
AP19 SERDES2_TX3_N SGMII8_TXN0O1.8 V VDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES2 4L_PHY
SGMII2_TXN0O
AP20 SERDES2_TX3_P SGMII2_TXP0O1.8 V VDDA_0P8_SERDES2 / VDDA_0P8_SERDES_C2 / VDDA_1P8_SERDES2 4L_PHY
SGMII8_TXP0O
AR14SERDES4_RX0_NSGMII5_RXN0I1.8 VVDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES44L_PHY
AR15SERDES4_RX0_PSGMII5_RXP0I1.8 VVDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES44L_PHY
AU14SERDES4_RX1_NSGMII6_RXN0I1.8 VVDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES44L_PHY
AU15SERDES4_RX1_PSGMII6_RXP0I1.8 VVDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES44L_PHY
AR17 SERDES4_RX2_N USB0_SSRX1NI1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
SGMII7_RXN0I
AR18 SERDES4_RX2_P USB0_SSRX1PI1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
SGMII7_RXP0I
AU17 SERDES4_RX3_N USB0_SSRX2NI1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
SGMII8_RXN0I
AU18 SERDES4_RX3_P USB0_SSRX2PI1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
SGMII8_RXP0I
AP13 SERDES4_TX0_N DP0_TXN0O1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
SGMII5_TXN0O
AP14 SERDES4_TX0_P SGMII5_TXP0O1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
DP0_TXP0O
AT13 SERDES4_TX1_N SGMII6_TXN0O1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
DP0_TXN1O
AT14 SERDES4_TX1_P DP0_TXP1O1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
SGMII6_TXP0O
AT16 SERDES4_TX2_N DP0_TXN2O1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
SGMII7_TXN0O
USB0_SSTX1NO
AT17 SERDES4_TX2_P SGMII7_TXP0O1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
DP0_TXP2O
USB0_SSTX1PO
AV18 SERDES4_TX3_N SGMII8_TXN0O1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
USB0_SSTX2NO
DP0_TXN3O
AV19 SERDES4_TX3_P SGMII8_TXP0O1.8 V VDDA_0P8_SERDES4 / VDDA_0P8_SERDES_C4 / VDDA_1P8_SERDES4 4L_PHY
USB0_SSTX2PO
DP0_TXP3O
AM34SOC_SAFETY_ERRORnPADCFG:
PADCONFIG_68
0x0011C110
SOC_SAFETY_ERRORn0IO1.8 V/3.3 VOff / Off / DownOn / SS / Down0PU/PDVDDSHV0YesLVCMOSNo
AN38 SPI0_CLKPADCFG:
PADCONFIG_53
0x0011C0D4
SPI0_CLK0IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0 Yes LVCMOS No
UART1_CTSn1I
I2C2_SCL2IOD
MCASP3_AXR03IO
EHRPWM2_A5IO
GPIO0_537IO
UART8_TXD11O
AM37 SPI0_CS0PADCFG:
PADCONFIG_51
0x0011C0CC
SPI0_CS00IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0 Yes LVCMOS No
MCASP3_ACLKX3IO
MCASP3_ACLKR4IO
EHRPWM0_A5IO
GPIO0_517IO
MCAN14_TX9O
DP0_HPD12I
AP38 SPI0_CS1PADCFG:
PADCONFIG_52
0x0011C0D0
SPI0_CS10IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0 Yes LVCMOS No
CPTS0_TS_COMP1O
UART0_RTSn2O
MCASP3_AFSX3IO
MCASP3_AFSR4IO
EHRPWM1_A5IO
GPIO0_527IO
MCAN14_RX9I
UART8_RXD11I
AM35 SPI0_D0PADCFG:
PADCONFIG_54
0x0011C0D8
SPI0_D00IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0 Yes LVCMOS No
UART1_RTSn1O
I2C2_SDA2IOD
MCASP3_AXR13IO
EHRPWM3_A5IO
GPIO0_547IO
UART2_RXD11I
AM36 SPI0_D1PADCFG:
PADCONFIG_55
0x0011C0DC
SPI0_D10IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0 Yes LVCMOS No
MCASP3_AXR23IO
EHRPWM4_A5IO
GPIO0_557IO
UART2_TXD11O
G35TCKPADCFG:
WKUP_PADCONFIG_73
0x4301C124
TCK0I1.8 V/3.3 VOn / NA / UpOn / Off / Up0PU/PDVDDSHV0_MCUYesLVCMOSNo
AL37TDIPADCFG:
PADCONFIG_69
0x0011C114
TDI0I1.8 V/3.3 VOn / Off / UpOn / Off / Up0PU/PDVDDSHV0YesLVCMOSNo
AL35TDOPADCFG:
PADCONFIG_70
0x0011C118
TDO0OZ1.8 V/3.3 VOff / Off / UpOff / SS / Up0PU/PDVDDSHV0YesLVCMOSNo
AR38 TIMER_IO0PADCFG:
PADCONFIG_58
0x0011C0E8
TIMER_IO00IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0 Yes LVCMOS No
ECAP1_IN_APWM_OUT1IO
SYSCLKOUT02O
UART3_RXD5I
PCIE1_CLKREQn6IO
GPIO0_587IO
MMC1_SDCD8I
MCAN13_TX9O
I2C6_SDA13IOD
AN37 TIMER_IO1PADCFG:
PADCONFIG_59
0x0011C0EC
TIMER_IO10IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0 Yes LVCMOS No
ECAP2_IN_APWM_OUT1IO
OBSCLK02O
UART3_TXD5O
USB0_DRVVBUS6O
GPIO0_597IO
MMC1_SDWP8I
MCAN13_RX9I
I2C6_SCL13IOD
OBSCLK015O
AL36TMSPADCFG:
PADCONFIG_71
0x0011C11C
TMS0I1.8 V/3.3 VOn / Off / UpOn / Off / Up0PU/PDVDDSHV0YesLVCMOSNo
G37TRSTnPADCFG:
WKUP_PADCONFIG_74
0x4301C128
TRSTn0I1.8 V/3.3 VOn / NA / DownOn / Off / Down0PU/PDVDDSHV0_MCUYesLVCMOSNo
AM7 UFS0_REF_CLK UFS0_REF_CLK0I1.2 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_REF_CLK16I
AM8 UFS0_RSTn UFS0_RSTn0I1.2 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_RSTn16I
AM4 UFS0_RX_DN0 UFS0_RX_DN00I1.8 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_RX_DN016I
AM1 UFS0_RX_DN1 UFS0_RX_DN10I1.8 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_RX_DN116I
AM5 UFS0_RX_DP0 UFS0_RX_DP00I1.8 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_RX_DP016I
AM2 UFS0_RX_DP1 UFS0_RX_DP10I1.8 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_RX_DP116I
AL2 UFS0_TX_DN0 UFS0_TX_DN00I1.8 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_TX_DN016I
AN2 UFS0_TX_DN1 UFS0_TX_DN10I1.8 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_TX_DN116I
AL3 UFS0_TX_DP0 UFS0_TX_DP00I1.8 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_TX_DP016I
AN3 UFS0_TX_DP1 UFS0_TX_DP10I1.8 V VDDA_1p8_UFS / VDDA_0P8_UFS M-PHY
UFS0_TX_DP116I
AP16USB0_DMUSB0_DMIO3.3 VVDDA_0P8_USB / VDDA_1P8_USB / VDDA_3P3_USBUSB2PHY
AP17USB0_DPUSB0_DPIO3.3 VVDDA_0P8_USB / VDDA_1P8_USB / VDDA_3P3_USBUSB2PHY
AN17USB0_IDUSB0_IDA3.3 VVDDA_0P8_USB / VDDA_1P8_USB / VDDA_3P3_USBUSB2PHY
AN18USB0_RCALIBUSB0_RCALIBA3.3 VVDDA_0P8_USB / VDDA_1P8_USB / VDDA_3P3_USBUSB2PHY
AN15USB0_VBUSUSB0_VBUSA5.0 VVDDA_0P8_USB / VDDA_1P8_USB / VDDA_3P3_USBDDR
AB27, AC24, AF15, AF18, AF21, AG11, AG28, T25VDDAR_COREVDDAR_COREPWR
AB13, AC16, AC18, AC20, AE12, M21, N23, T15, U20, W14, W21, Y11, Y19VDDAR_CPUVDDAR_CPUPWR
M27, N24VDDAR_MCUVDDAR_MCUPWR
AJ24VDDA_0P8_DSITXVDDA_0P8_DSITXPWR
AJ25VDDA_0P8_DSITX_CVDDA_0P8_DSITX_CPWR
AH11VDDA_0P8_UFSVDDA_0P8_UFSPWR
AK20VDDA_0P8_USBVDDA_0P8_USBPWR
AJ28VDDA_0P8_CSIRX2VDDA_0P8_CSIRX2PWR
AJ26, AK26VDDA_0P8_CSIRX0_1VDDA_0P8_CSIRX0_1PWR
AE9VDDA_0P8_DLL_MMC0VDDA_0P8_DLL_MMC0PWR
U11VDDA_0P8_PLL_DDR0VDDA_0P8_PLL_DDR0PWR
M14VDDA_0P8_PLL_DDR1VDDA_0P8_PLL_DDR1PWR
N11VDDA_0P8_PLL_DDR2VDDA_0P8_PLL_DDR2PWR
M18VDDA_0P8_PLL_DDR3VDDA_0P8_PLL_DDR3PWR
AJ20, AJ21VDDA_0P8_SERDES2VDDA_0P8_SERDES2PWR
AJ17, AJ18VDDA_0P8_SERDES4VDDA_0P8_SERDES4PWR
AJ12, AJ15, AK13, AK14VDDA_0P8_SERDES0_1VDDA_0P8_SERDES0_1PWR
AG21, AH20VDDA_0P8_SERDES_C2VDDA_0P8_SERDES_C2PWR
AG17, AH18VDDA_0P8_SERDES_C4VDDA_0P8_SERDES_C4PWR
AH12, AH13, AH15, AH16VDDA_0P8_SERDES_C0_1VDDA_0P8_SERDES_C0_1PWR
AH24, AH25VDDA_1P8_DSITXVDDA_1P8_DSITXPWR
AJ10VDDA_1P8_UFSVDDA_1P8_UFSPWR
AK21VDDA_1P8_USBVDDA_1P8_USBPWR
AH29, AJ29VDDA_1P8_CSIRX2VDDA_1P8_CSIRX2PWR
AH27, AH28VDDA_1P8_CSIRX0_1VDDA_1P8_CSIRX0_1PWR
AH21VDDA_1P8_SERDES2VDDA_1P8_SERDES2PWR
AH17VDDA_1P8_SERDES4VDDA_1P8_SERDES4PWR
AJ13, AJ14VDDA_1P8_SERDES0_1VDDA_1P8_SERDES0_1PWR
AJ23VDDA_1P8_SERDES2_4VDDA_1P8_SERDES2_4PWR
AJ19VDDA_3P3_USBVDDA_3P3_USBPWR
M31VDDA_ADC0VDDA_ADC0PWR
N30VDDA_ADC1VDDA_ADC1PWR
M28VDDA_MCU_PLLGRP0VDDA_MCU_PLLGRP0PWR
M26VDDA_MCU_TEMPVDDA_MCU_TEMPPWR
N29VDDA_OSC1VDDA_OSC1PWR
AA27VDDA_PLLGRP0VDDA_PLLGRP0PWR
Y28VDDA_PLLGRP1VDDA_PLLGRP1PWR
AG13VDDA_PLLGRP2VDDA_PLLGRP2PWR
V14VDDA_PLLGRP5VDDA_PLLGRP5PWR
R21VDDA_PLLGRP6VDDA_PLLGRP6PWR
P12VDDA_PLLGRP7VDDA_PLLGRP7PWR
P15VDDA_PLLGRP8VDDA_PLLGRP8PWR
Y26VDDA_PLLGRP9VDDA_PLLGRP9PWR
AG23VDDA_PLLGRP10VDDA_PLLGRP10PWR
AA23VDDA_PLLGRP12VDDA_PLLGRP12PWR
AB26VDDA_PLLGRP13VDDA_PLLGRP13PWR
N28VDDA_POR_WKUPVDDA_POR_WKUPPWR
Y27VDDA_TEMP0VDDA_TEMP0PWR
M12VDDA_TEMP1VDDA_TEMP1PWR
W23VDDA_TEMP2VDDA_TEMP2PWR
AE13VDDA_TEMP3VDDA_TEMP3PWR
AD18VDDA_TEMP4VDDA_TEMP4PWR
K31, L32VDDA_WKUPVDDA_WKUPPWR
V30, V32, W31VDDSHV0VDDSHV0PWR
H29, J28, K29VDDSHV0_MCUVDDSHV0_MCUPWR
H25, J24, K25VDDSHV1_MCUVDDSHV1_MCUPWR
T30, T32, U31VDDSHV2VDDSHV2PWR
H27, J26, K27VDDSHV2_MCUVDDSHV2_MCUPWR
P31, R30, R31VDDSHV5VDDSHV5PWR
A31, AK1, B1, H11, H13, H15, H17, H19, H9, J10, J12, J14, J16, J18, J8, K11, K13, K15, K17, K19, K9, L10, L12, L14, L16, L18, M9, N10, N8, P9, R10, R8, T9, U10, U8VDDS_DDRVDDS_DDRPWR
T10VDDS_DDR_C0VDDS_DDR_C0PWR
L15VDDS_DDR_C1VDDS_DDR_C1PWR
M10VDDS_DDR_C2VDDS_DDR_C2PWR
L17VDDS_DDR_C3VDDS_DDR_C3PWR
AF9, AG10, AG8, AH9VDDS_MMC0VDDS_MMC0PWR
AA24, AA26, AA28, AA30, AB25, AB29, AB31, AC26, AC28, AC30, AD25, AD27, AD29, AD31, AE24, AE26, AE28, AE30, AE32, AF13, AF17, AF19, AF23, AF25, AF27, AF29, AF31, AG12, AG14, AG16, AG18, AG20, AG22, AG24, AG26, AG30, AG32, AH31, AJ30, M11, M13, M15, M17, M19, N12, N16, N18, P11, P17, P19, R12, R14, R16, R18, R24, R26, R28, T11, T13, T27, U12, U24, U26, U28, V25, V27, W24, W26, W28, W30, W32, Y25, Y29, Y31VDD_COREVDD_COREPWR
AA10, AA12, AA14, AA20, AA22, AA8, AB11, AB19, AB21, AB23, AB9, AC10, AC12, AC14, AC22, AD11, AD13, AD15, AD17, AD19, AD21, AD23, AD9, AE10, AE14, AE16, AE18, AE20, AE22, AF11, H21, H23, J20, J22, K21, K23, L20, L22, N20, N22, P21, R20, R22, T17, T19, T21, T23, U14, U22, V11, V13, V19, V21, V23, V9, W10, W12, W20, W22, W8, Y13, Y21, Y23, Y9VDD_CPUVDD_CPUPWR
L24, M23, M25, N26, P23, P25, P27VDD_MCUVDD_MCUPWR
L28VDD_MCU_WAKE1VDD_MCU_WAKE1PWR
U29VDD_WAKE0VDD_WAKE0PWR
K28VMON1_ER_VSYSVMON1_ER_VSYSA
N27VMON2_IR_VCPUVMON2_IR_VCPUA
J30VMON3_IR_VEXT1P8VMON3_IR_VEXT1P8A
P28VMON4_IR_VEXT1P8VMON4_IR_VEXT1P8A
R29VMON5_IR_VEXT3P3VMON5_IR_VEXT3P3A
AA31VPP_COREVPP_COREPWR
L29VPP_MCUVPP_MCUPWR
A1, A10, A12, A15, A2, A20, A23, A25, A28, A34, A37, A5, A7, AA11, AA13, AA19, AA2, AA21, AA25, AA29, AA34, AA36, AA38, AA5, AA9, AB1, AB10, AB12, AB14, AB20, AB22, AB24, AB28, AB30, AB32, AB33, AB35, AB37, AB5, AB8, AC11, AC13, AC15, AC17, AC19, AC2, AC21, AC23, AC25, AC27, AC29, AC31, AC6, AC9, AD1, AD10, AD12, AD14, AD16, AD20, AD22, AD24, AD26, AD28, AD30, AD32, AD35, AD4, AD8, AE11, AE15, AE17, AE19, AE2, AE21, AE23, AE25, AE27, AE29, AE31, AE5, AF10, AF12, AF14, AF16, AF20, AF22, AF24, AF26, AF28, AF3, AF30, AF32, AF6, AF8, AG1, AG15, AG19, AG25, AG27, AG29, AG31, AG4, AG7, AG9, AH10, AH14, AH19, AH2, AH22, AH23, AH26, AH30, AH32, AH35, AH5, AH8, AJ11, AJ16, AJ22, AJ27, AJ3, AJ31, AJ6, AJ8, AJ9, AK10, AK11, AK12, AK15, AK16, AK17, AK18, AK19, AK22, AK23, AK24, AK25, AK27, AK28, AK30, AK32, AL1, AL10, AL12, AL13, AL14, AL15, AL16, AL17, AL18, AL19, AL21, AL26, AL29, AL31, AL4, AM11, AM13, AM15, AM18, AM20, AM23, AM25, AM27, AM3, AM30, AM32, AM38, AM6, AN1, AN10, AN12, AN14, AN16, AN19, AN22, AN25, AN28, AN31, AN34, AN4, AN7, AP12, AP15, AP18, AP21, AP24, AP27, AP3, AP30, AP33, AP36, AP6, AP9, AR1, AR10, AR13, AR16, AR19, AR22, AR25, AR28, AR31, AR34, AR37, AR4, AR7, AT12, AT15, AT18, AT21, AT24, AT27, AT3, AT30, AT33, AT36, AT6, AT9, AU1, AU10, AU13, AU16, AU19, AU22, AU25, AU28, AU31, AU34, AU37, AU38, AU4, AU7, AV1, AV11, AV14, AV17, AV2, AV20, AV23, AV26, AV29, AV32, AV35, AV5, AV8, B11, B13, B16, B19, B22, B24, B26, B29, B31, B38, B6, B9, C14, C17, C18, C2, C21, C27, C30, C4, C8, D10, D15, D20, D23, D28, D3, D35, D6, D7, E12, E13, E16, E19, E2, E22, E25, E26, E29, E31, E5, E9, F1, F11, F14, F17, F21, F24, F27, F30, F4, F7, F8, G15, G18, G20, G28, G3, G6, H10, H16, H18, H2, H20, H22, H24, H26, H28, H30, H31, H5, H7, H8, J1, J11, J13, J15, J17, J19, J21, J23, J25, J27, J29, J32, J4, J9, K10, K12, K14, K16, K18, K2, K20, K22, K24, K26, K6, K8, L1, L11, L13, L19, L21, L23, L31, L5, L9, M16, M2, M20, M22, M24, M29, M30, M32, M5, M8, N15, N17, N19, N21, N25, N3, N31, N32, N38, N6, N9, P1, P10, P16, P18, P20, P22, P24, P26, P30, P32, P35, P37, P4, P7, P8, R11, R13, R15, R17, R19, R2, R23, R25, R27, R32, R34, R36, R38, R5, R9, T12, T14, T16, T18, T20, T22, T24, T26, T28, T3, T31, T33, T35, T37, T6, T8, U13, U19, U21, U23, U25, U27, U3, U30, U32, U34, U36, U38, U6, U9, V10, V12, V2, V20, V22, V24, V26, V28, V31, V33, V35, V37, V5, V8, W1, W11, W13, W19, W25, W27, W29, W34, W36, W38, W4, W7, W9, Y10, Y12, Y14, Y20, Y22, Y24, Y3, Y30, Y32, Y33, Y35, Y37, Y6, Y8VSSVSSGND
H38 WKUP_GPIO0_0PADCFG:
WKUP_PADCONFIG_48
0x4301C0C0
MCU_SPI1_CLK0IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_SPI1_CLK1IO
WKUP_GPIO0_07IO
MCU_BOOTMODE03BOOTSTRAPI
J34 WKUP_GPIO0_1PADCFG:
WKUP_PADCONFIG_49
0x4301C0C4
MCU_SPI1_D00IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_SPI1_D01IO
WKUP_GPIO0_17IO
MCU_BOOTMODE04BOOTSTRAPI
J35 WKUP_GPIO0_2PADCFG:
WKUP_PADCONFIG_50
0x4301C0C8
MCU_SPI1_D10IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_SPI1_D11IO
WKUP_GPIO0_27IO
MCU_BOOTMODE05BOOTSTRAPI
J36 WKUP_GPIO0_3PADCFG:
WKUP_PADCONFIG_51
0x4301C0CC
MCU_SPI1_CS00IO1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_SPI1_CS01IO
WKUP_GPIO0_37IO
H35 WKUP_GPIO0_4PADCFG:
WKUP_PADCONFIG_52
0x4301C0D0
MCU_MCAN1_TX0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_MCAN1_TX1O
MCU_SPI0_CS32IO
MCU_ADC_EXT_TRIGGER03I
WKUP_GPIO0_47IO
K36 WKUP_GPIO0_5PADCFG:
WKUP_PADCONFIG_53
0x4301C0D4
MCU_MCAN1_RX0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_MCAN1_RX1I
MCU_SPI1_CS32IO
MCU_ADC_EXT_TRIGGER13I
WKUP_GPIO0_57IO
L37 WKUP_GPIO0_6PADCFG:
WKUP_PADCONFIG_54
0x4301C0D8
WKUP_UART0_CTSn0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_UART0_CTSn1I
MCU_CPTS0_HW1TSPUSH2I
MCU_I2C1_SCL3IOD
WKUP_GPIO0_67IO
L36 WKUP_GPIO0_7PADCFG:
WKUP_PADCONFIG_55
0x4301C0DC
WKUP_UART0_RTSn0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_UART0_RTSn1O
MCU_CPTS0_HW2TSPUSH2I
MCU_I2C1_SDA3IOD
WKUP_GPIO0_77IO
L35 WKUP_GPIO0_8PADCFG:
WKUP_PADCONFIG_56
0x4301C0E0
MCU_I2C1_SCL0IOD1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_I2C1_SCL1IOD
MCU_CPTS0_TS_SYNC2O
MCU_I3C0_SCL3IO
MCU_TIMER_IO64IO
WKUP_GPIO0_87IO
L34 WKUP_GPIO0_9PADCFG:
WKUP_PADCONFIG_57
0x4301C0E4
MCU_I2C1_SDA0IOD1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_I2C1_SDA1IOD
MCU_CPTS0_TS_COMP2O
MCU_I3C0_SDA3IO
MCU_TIMER_IO74IO
WKUP_GPIO0_97IO
L33 WKUP_GPIO0_10PADCFG:
WKUP_PADCONFIG_58
0x4301C0E8
MCU_EXT_REFCLK00I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_EXT_REFCLK01I
MCU_UART0_TXD2O
MCU_ADC_EXT_TRIGGER03I
MCU_CPTS0_RFT_CLK4I
MCU_SYSCLKOUT05O
WKUP_GPIO0_107IO
M38 WKUP_GPIO0_11PADCFG:
WKUP_PADCONFIG_59
0x4301C0EC
MCU_OBSCLK00O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_OBSCLK01O
MCU_UART0_RXD2I
MCU_ADC_EXT_TRIGGER13I
MCU_TIMER_IO14IO
MCU_I3C0_SDAPULLEN5OD
MCU_CLKOUT06OZ
WKUP_GPIO0_117IO
J37 WKUP_GPIO0_12PADCFG:
WKUP_PADCONFIG_60
0x4301C0F0
MCU_UART0_TXD0O1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_SPI0_CS11IO
WKUP_GPIO0_127IO
MCU_BOOTMODE08BOOTSTRAPI
K38 WKUP_GPIO0_13PADCFG:
WKUP_PADCONFIG_61
0x4301C0F4
MCU_UART0_RXD0I1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_SPI1_CS11IO
WKUP_GPIO0_137IO
MCU_BOOTMODE09BOOTSTRAPI
H37 WKUP_GPIO0_14PADCFG:
WKUP_PADCONFIG_62
0x4301C0F8
MCU_UART0_CTSn0I1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_SPI0_CS21IO
MCU_TIMER_IO84IO
WKUP_GPIO0_147IO
MCU_BOOTMODE06BOOTSTRAPI
K37 WKUP_GPIO0_15PADCFG:
WKUP_PADCONFIG_63
0x4301C0FC
MCU_UART0_RTSn0O1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
MCU_SPI1_CS21IO
MCU_TIMER_IO94IO
WKUP_GPIO0_157IO
MCU_BOOTMODE07BOOTSTRAPI
M33 WKUP_GPIO0_49PADCFG:
WKUP_PADCONFIG_100
0x4301C190
PMIC_WAKE1n0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS No
MCU_EXT_REFCLK01I
MCU_CPTS0_RFT_CLK2I
WKUP_GPIO0_497IO
M37 WKUP_GPIO0_56PADCFG:
WKUP_PADCONFIG_72
0x4301C120
MCU_TIMER_IO64IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS No
WKUP_GPIO0_567IO
BOOTMODE04BOOTSTRAPI
M36 WKUP_GPIO0_57PADCFG:
WKUP_PADCONFIG_95
0x4301C17C
MCU_TIMER_IO74IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS No
WKUP_GPIO0_577IO
BOOTMODE05BOOTSTRAPI
N34 WKUP_GPIO0_66PADCFG:
WKUP_PADCONFIG_96
0x4301C180
WKUP_GPIO0_667IO1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
BOOTMODE06BOOTSTRAPI
M34 WKUP_GPIO0_67PADCFG:
WKUP_PADCONFIG_97
0x4301C184
WKUP_LF_CLKIN1I1.8 V/3.3 V On / Off / Off On / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_GPIO0_677IO
BOOTMODE07BOOTSTRAPI
N33 WKUP_I2C0_SCLPADCFG:
WKUP_PADCONFIG_64
0x4301C100
WKUP_I2C0_SCL0IOD1.8 V/3.3 V Off / Off / Off On / SS / Off 0 VDDSHV0_MCU Yes I2C OPEN DRAIN Yes
WKUP_GPIO0_637IO
N35 WKUP_I2C0_SDAPADCFG:
WKUP_PADCONFIG_65
0x4301C104
WKUP_I2C0_SDA0IOD1.8 V/3.3 V Off / Off / Off On / SS / Off 0 VDDSHV0_MCU Yes I2C OPEN DRAIN Yes
WKUP_GPIO0_647IO
T38WKUP_OSC0_XIWKUP_OSC0_XII1.8 VVDDA_WKUPYesHFXOSCNo
U37WKUP_OSC0_XOWKUP_OSC0_XOO1.8 VVDDA_WKUPYesHFXOSCNo
K35 WKUP_UART0_RXDPADCFG:
WKUP_PADCONFIG_44
0x4301C0B0
WKUP_UART0_RXD0I1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_GPIO0_587IO
K34 WKUP_UART0_TXDPADCFG:
WKUP_PADCONFIG_45
0x4301C0B4
WKUP_UART0_TXD0O1.8 V/3.3 V Off / Off / Off Off / Off / Off 7 PU/PD VDDSHV0_MCU Yes LVCMOS Yes
WKUP_GPIO0_597IO
The MUXMODE field is not used to select the multiplexed signal function for this pin. For more information, see ADC Integration Details section in Device Configuration chapter of the device TRM.