SPRSP36K September 2021 – April 2024 TDA4VM , TDA4VM-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
For more details about features and additional description information on the device HyperBus, see the corresponding sections within Section 5.3, Signal Descriptions and Section 7, Detailed Description.
Section 6.9.5.13.1, Section 6.9.5.13.2, and Section 6.9.5.13.3 assume testing over the recommended operating conditions and electrical characteristic conditions (see Figure 6-78, Figure 6-79, and Figure 6-80).
Table 6-59 represents HyperBus timing conditions.
PARAMETER | DESCRIPTION | MIN | MAX | UNIT | |
---|---|---|---|---|---|
INPUT CONDITIONS | |||||
SRI | Input slew rate | 2 | 5 | V/ns | |
OUTPUT CONDITIONS | |||||
CL | Output load capacitance | 1.5 | 10 | pF | |
PCB CONNECTIVITY REQUIREMENTS | |||||
td(Trace Mismatch Delay) | Propagation delay mismatch between traces | CK and CKn; RWDS and DQ[7:0] |
10 | ps | |
CK/CKn and RWDS; CK/CKn and CSn |
200 | ps | |||
CK/CKn and DQ[7:0] | 35 | ps | |||
RESETn and CSn[1:0] | 340 | ps |