SNAS854 February 2023 TDC1000-Q1
PRODUCTION DATA
#GUID-D52B58BA-FB8F-40CD-9790-27F8DD119B14/SNAS648182 lists the memory-mapped registers for the TDC1000-Q1. All register addresses not listed in #GUID-D52B58BA-FB8F-40CD-9790-27F8DD119B14/SNAS648182 should be considered as reserved locations and the register contents should not be modified.
Address (Hex) | ACRONYM | REGISTER NAME | RESET VALUE | SECTION |
---|---|---|---|---|
0h | CONFIG_0 | Config-0 | 45h | See here |
1h | CONFIG_1 | Config-1 | 40h | See here |
2h | CONFIG_2 | Config-2 | 0h | See here |
3h | CONFIG_3 | Config-3 | 3h | See here |
4h | CONFIG_4 | Config-4 | 1Fh | See here |
5h | TOF_1 | TOF-1 | 0h | See here |
6h | TOF_0 | TOF-0 | 0h | See here |
7h | ERROR_FLAGS | Error Flags | 0h | See here |
8h | TIMEOUT | Timeout | 19h | See here |
9h | CLOCK_RATE | Clock Rate | 0h | See here |
Return to #GUID-D52B58BA-FB8F-40CD-9790-27F8DD119B14/SNAS648182.
(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
TX_FREQ_DIV | NUM_TX | ||||||
R/W-2h | R/W-5h |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7:5] | TX_FREQ_DIV(1) | R/W | 2h | Frequency divider for TX clock and T1 0h: Divide by 2 1h: Divide by 4 2h: Divide by 8 (default) 3h: Divide by 16 4h: Divide by 32 5h: Divide by 64 6h: Divide by 128 7h: Divide by 256 |
[4:0] | NUM_TX | R/W | 5h | Number of TX pulses in a burst, ranging from 0 to 31. 5h: 5 pulses (default) |
Return to #GUID-D52B58BA-FB8F-40CD-9790-27F8DD119B14/SNAS648182.
(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
RESERVED | NUM_AVG | NUM_RX | |||||
R/W-1h | R/W-0h | R/W-0h |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7:6] | RESERVED | R/W | 1h | 1h: Reserved (default) |
[5:3] | NUM_AVG | R/W | 0h | Number of measurement cycles to average in stopwatch/MCU 0h: 1 measurement cycle (default) 1h: 2 measurement cycles 2h: 4 measurement cycles 3h: 8 measurement cycles 4h: 16 measurement cycles 5h: 32 measurement cycles 6h: 64 measurement cycles 7h: 128 measurement cycles |
[2:0] | NUM_RX | R/W | 0h | Number of expected receive events 0h: Do not count events (32 STOP pulses output) (default) 1h: 1 event (1 STOP pulse output) 2h: 2 events (2 STOP pulses output) 3h: 3 events (3 STOP pulses output) 4h: 4 events (4 STOP pulses output) 5h: 5 events (5 STOP pulses output) 6h: 6 events (6 STOP pulses output) 7h: 7 events (7 STOP pulses output) |
Return to #GUID-D52B58BA-FB8F-40CD-9790-27F8DD119B14/SNAS648182.
(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
VCOM_SEL | MEAS_MODE | DAMPING | CH_SWP | EXT_CHSEL | CH_SEL | TOF_MEAS_MODE | |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7] | VCOM_SEL | R/W | 0h | Common-mode voltage reference control 0h: Internal (default) 1h: External |
[6] | MEAS_MODE | R/W | 0h | AFE measurement type 0h: Time-of-flight measurement (default) 1h: Temperature measurement |
[5] | DAMPING | R/W | 0h | TX burst damping 0h: Disable damping (default) 1h: Enable damping |
[4] | CH_SWP | R/W | 0h | Automatic channel swap in Mode 2 of operation. The setting is ignored if EXT_CHSEL = 1. 0h: Disable automatic channel swap (default) 1h: Enable automatic channel swap |
[3] | EXT_CHSEL | R/W | 0h | External channel select by CHSEL pin 0h: Disable external channel select (default). 1h: Enable external channel select EXT_CHSEL = 1 overrides the CH_SWP and CH_SEL settings. |
[2] | CH_SEL | R/W | 0h | Active TX/RX channel pair. 0h: Channel 1 (default) 1h: Channel 2 See Time-of-Flight Measurement Mode for channel definitions. The setting is ignored if EXT_CHSEL = 1. |
[1:0] | TOF_MEAS_MODE | R/W | 0h | Time-of-flight measurement mode 0h: Mode 0 (default) 1h: Mode 1 2h: Mode 2 3h: Reserved |
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(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
RESERVED | TEMP_MODE | TEMP_RTD_SEL | TEMP_CLK_DIV | BLANKING | ECHO_QUAL_THLD | ||
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-3h |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7] | RESERVED | R/W | 0h | 0h: Reserved (default) |
[6] | TEMP_MODE | R/W | 0h | Temperature measurement channels 0h: Measure REF, RTD1 and RTD2 (default) 1h: Measure REF and RTD1 |
[5] | TEMP_RTD_SEL | R/W | 0h | RTD type 0h: PT1000 (default) 1h: PT500 |
[4] | TEMP_CLK_DIV | R/W | 0h | Clock divider for temperature mode 0h: Divide by 8 (default) 1h: Use TX_FREQ_DIV |
[3] | BLANKING | R/W | 0h | Power blanking in standard TOF measurements. The blanking length is controlled with the TIMING_REG field (see Standard TOF Measurement With Power Blanking). 0h: Disable power blanking (default) 1h: Enable power blanking |
[2:0] | ECHO_QUAL_THLD | R/W | 3h | Echo qualification DAC threshold level with respect to VCOM 0h: –35 mV 1h: –50 mV 2h: –75 mV 3h: –125 mV (default) 4h: –220 mV 5h: –410 mV 6h: –775 mV 7h: –1500 mV |
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(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
RESERVED | RECEIVE_ MODE | TRIG_EDGE_ POLARITY | TX_PH_SHIFT_POS | ||||
R/W-0h | R/W-0h | R/W-0h | R/W-1Fh |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7] | RESERVED | R/W | 0h | 0h: Reserved (default) |
[6] | RECEIVE_MODE | R/W | 0h | Receive echo mode 0h: Single echo (default) 1h: Multi echo |
[5] | TRIG_EDGE_POLARITY | R/W | 0h | Trigger edge polarity 0h: Rising edge (default) 1h: Falling edge |
[4:0] | TX_PH_SHIFT_POS | R/W | 1Fh | TX 180° pulse shift position, ranging from 0 to 31. 1Fh: Position 31 (default) TI does not recommend setting TX_PH_SHIFT_POS to 0 or 1. |
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(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
PGA_GAIN | PGA_CTRL | LNA_CTRL | LNA_FB | TIMING_REG[9:8] | |||
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7:5] | PGA_GAIN | R/W | 0h | PGA gain 0h: 0 dB (default) 1h: 3 dB 2h: 6 dB 3h: 9 dB 4h: 12 dB 5h: 15 dB 6h: 18 dB 7h: 21 dB |
[4] | PGA_CTRL | R/W | 0h | PGA control 0h: Active (default) 1h: Bypassed and powered off |
[3] | LNA_CTRL | R/W | 0h | LNA control 0h: Active (default) 1h: Bypassed and powered off |
[2] | LNA_FB | R/W | 0h | LNA feedback mode 0h: Capacitive feedback (default) 1h: Resistive feedback |
[1:0] | TIMING_REG[9:8] | R/W | 0h | The 2 most significant bits of the TIMING_REG field (see Standard TOF Measurement and Standard TOF Measurement With Power Blanking) 0h: 0 (default) |
Return to #GUID-D52B58BA-FB8F-40CD-9790-27F8DD119B14/SNAS648182.
(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
TIMING_REG[7:0] | |||||||
R/W-0h |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7:0] | TIMING_REG[7:0] | R/W | 0h | The 8 least significant bits of the TIMING_REG field (see Standard TOF Measurement and Standard TOF Measurement With Power Blanking) 0h: 0 (default) |
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7 (MSB) | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
RESERVED | ERR_ SIG_WEAK | ERR_NO_SIG | ERR_ SIG_HIGH | ||||
R-0h | R-0h | R/W1C-0 | R/W1C-0 |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7:3] | RESERVED | R | 0h | 0h: Reserved (default) |
[2] | ERR_SIG_WEAK | R | 0h | 1h: The number of received and qualified zero-crossings was less than the expected number set in NUM_RX field and a timeout occurred. |
[1] | ERR_NO_SIG | R/W1C | 0h | 1h: No signals were received and timeout occurred. Writing a 1 to this field resets the state machine, halts active measurements and returns the device to the SLEEP or READY mode and resets the average counter and automatic channel selection in measurement Mode 2. |
[0] | ERR_SIG_HIGH | R/W1C | 0h | 1h: The received echo amplitude exceeds the largest echo qualification threshold at the input of the comparators. The error is only reported when ECHO_QUAL_THLD = 0x07. Writing a 1 to this field will reset all the error flags and reset the ERRB pin to high. |
Return to #GUID-D52B58BA-FB8F-40CD-9790-27F8DD119B14/SNAS648182.
(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
RESERVED | FORCE_ SHORT_TOF | SHORT_TOF_BLANK_PERIOD | ECHO_ TIMEOUT | TOF_TIMEOUT_CTRL | |||
R/W-0h | R/W-0h | R/W-3h | R/W-0h | R/W-1h |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7] | RESERVED | R/W | 0h | 0h: Reserved (default) |
[6] | FORCE_SHORT_TOF | R/W | 0h | Short time-of-flight control 0h: Disabled (default) 1h: Force a short time-of-flight measurement |
[5:3] | SHORT_TOF_BLANK_PERIOD(1) | R/W | 3h | Short time-of-flight blanking period (see Short TOF Measurement) 0h: 8 × T0 1h: 16 × T0 2h: 32 × T0 3h: 64 × T0 (default) 4h: 128 × T0 5h: 256 × T0 6h: 512 × T0 7h: 1024 × T0 |
[2] | ECHO_TIMEOUT | R/W | 0h | Echo receive timeout control (see TOF Measurement Interval) 0h: Enable echo timeout (default) 1h: Disable timeout |
[1:0] | TOF_TIMEOUT_CTRL(1) | R/W | 1h | Echo listening window timeout (see TOF Measurement Interval) 0h: 128 × T0 1h: 256 × T0 (default) 2h: 512 × T0 3h: 1024 × T0 |
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(MSB) 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 (LSB) |
RESERVED | CLOCKIN_DIV | AUTOZERO_PERIOD | |||||
R/W-0h | R/W-0h | R/W-0h |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7:3] | RESERVED | R/W | 0h | 0h: Reserved (default) |
[2] | CLOCKIN_DIV(1) | R/W | 0h | CLKIN divider to generate T0 0h: Divide by 1 (default) 1h: Divide by 2 |
[1:0] | AUTOZERO_PERIOD(1) | R/W | 0h | Receiver auto-zero period 0h: 64 × T0 (default) 1h: 128 × T0 2h: 256 × T0 3h: 512 × T0 |