SNAS670 July 2015 TDC1011-Q1
PRODUCTION DATA.
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
NC | 1 | No Connect (leave floating) | |
RX | 2 | I | Receive input |
VCOM | 3 | P | Output common mode voltage bias |
LNAOUT | 4 | O | Low noise amplifier output (for ac decoupling capacitor) |
PGAIN | 5 | I | Programmable gain amplifier input |
PGAOUT | 6 | O | Programmable gain amplifier output |
COMPIN | 7 | I | Echo qualification and zero-crossing detector input |
RTD1 | 8 | O | Resistance temperature detector channel 1 |
RTD2 | 9 | O | Resistance temperature detector channel 2 |
RREF | 10 | O | Reference resistor for temperature measurement |
RES | 11 | I | Reserved (connect to GND) |
ERRB | 12 | O | Error flag (open drain) |
START | 13 | O | Start pulse output |
STOP | 14 | O | Stop pulse output |
EN | 15 | I | Enable (active high; when low the TDC1011 is in SLEEP mode) |
TRIGGER | 16 | I | Trigger input |
RESET | 17 | I | Reset (active high) |
SCLK | 18 | I | Serial clock for the SPI interface |
CSB | 19 | I | Chip select for the SPI interface (active low) |
SDI | 20 | I | Serial data input for the SPI interface |
SDO | 21 | O | Serial data output for the SPI interface |
VIO | 22 | P | Positive I/O supply |
VDD | 23, 24 | P | Positive supply; all VDD supply pins must be connected to the supply. Place a 100-nF bypass capacitor to ground in close proximity to the pin. |
CLKIN | 25 | I | Clock input |
GND | 26 | G | Negative supply |
NC | 27 | No Connect (leave floating) | |
TX | 28 | O | Transmit output |