SNAS647D
February 2015 – March 2016
TDC7200
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Companion Device
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Switching Characteristics
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
LDO
8.3.2
CLOCK
8.3.3
Counters
8.3.3.1
Coarse and Clock Counters Description
8.3.3.2
Coarse and Clock Counters Overflow
8.3.3.3
Clock Counter STOP Mask
8.3.3.4
ENABLE
8.4
Device Functional Modes
8.4.1
Calibration
8.4.2
Measurement Modes
8.4.2.1
Measurement Mode 1
8.4.2.1.1
Calculating Time-of-Flight (Measurement Mode 1)
8.4.2.2
Measurement Mode 2
8.4.2.2.1
Calculating Time-of-Flight (TOF) (Measurement Mode 2)
8.4.3
Timeout
8.4.4
Multi-Cycle Averaging
8.4.5
START and STOP Edge Polarity
8.4.6
Measurement Sequence
8.4.7
Wait Times for TDC7200 Startup
8.5
Programming
8.5.1
Serial Peripheral Interface (SPI)
8.5.1.1
CSB
8.5.1.2
SCLK
8.5.1.3
DIN
8.5.1.4
DOUT
8.5.1.5
Register Read/Write
8.5.1.6
Auto Increment Mode
8.6
Register Maps
8.6.1
Register Initialization
8.6.2
CONFIG1: Configuration Register 1 R/W (address = 00h) [reset = 0h]
8.6.3
CONFIG2: Configuration Register 2 R/W (address = 01h) [reset = 40h]
8.6.4
INT_STATUS: Interrupt Status Register (address = 02h) [reset = 00h]
8.6.5
INT_MASK: Interrupt Mask Register R/W (address = 03h) [reset = 07h]
8.6.6
COARSE_CNTR_OVF_H: Coarse Counter Overflow High Value Register (address = 04h) [reset = FFh]
8.6.7
COARSE_CNTR_OVF_L: Coarse Counter Overflow Low Value Register (address = 05h) [reset = FFh ]
8.6.8
CLOCK_CNTR_OVF_H: Clock Counter Overflow High Register (address = 06h) [reset = FFh]
8.6.9
CLOCK_CNTR_OVF_L: Clock Counter Overflow Low Register (address = 07h) [reset = FFh]
8.6.10
CLOCK_CNTR_STOP_MASK_H: CLOCK Counter STOP Mask High Value Register (address = 08h) [reset = 00h]
8.6.11
CLOCK_CNTR_STOP_MASK_L: CLOCK Counter STOP Mask Low Value Register (address = 09h) [reset = 00h]
8.6.12
TIME1: Time 1 Register (address: 10h) [reset = 00_0000h]
8.6.13
CLOCK_COUNT1: Clock Count Register (address: 11h) [reset = 00_0000h]
8.6.14
TIME2: Time 2 Register (address: 12h) [reset = 00_0000h]
8.6.15
CLOCK_COUNT2: Clock Count Register (address: 13h) [reset = 00_0000h]
8.6.16
TIME3: Time 3 Register (address: 14h) [reset = 00_0000h]
8.6.17
CLOCK_COUNT3: Clock Count Registers (address: 15h) [reset = 00_0000h]
8.6.18
TIME4: Time 4 Register (address: 16h) [reset = 00_0000h]
8.6.19
CLOCK_COUNT4: Clock Count Register (address: 17h) [reset = 00_0000h]
8.6.20
TIME5: Time 5 Register (address: 18h) [reset = 00_0000h]
8.6.21
CLOCK_COUNT5: Clock Count Register (address: 19h) [reset = 00_0000h]
8.6.22
TIME6: Time 6 Register (address: 1Ah) [reset = 00_0000h]
8.6.23
CALIBRATION1: Calibration 1 Register (address: 1Bh ) [reset = 00_0000h]
8.6.24
CALIBRATION2: Calibration 2 Register (address: 1Ch ) [reset = 00_0000h]
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Flow Meter Regulations and Accuracy
9.2.2.2
Transmit Time in Ultrasonic Flow Meters
9.2.2.3
ΔTOF Accuracy Requirement Calculation
9.2.3
Application Curves
9.3
Post Filtering Recommendations
9.4
CLOCK Recommendations
9.4.1
CLOCK Accuracy
9.4.2
CLOCK Jitter
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|14
MPDS360A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snas647d_oa
snas647d_pm
5 Companion Device
PART NO.
TITLE
TDC1000
Ultrasonic Sensing Analog Front End for Level, Concentration, Flow and Proximity Sensing