The TDC7201 is designed for use with ultrasonic, laser and radar range finding equipment using time-of-flight technique. The TDC7201 has two built-in Time-to-Digital Converters (TDCs) that can be used to measure distance down to 4 cm and up to several kilometers using a simple architecture, which eliminates the need to use expensive FPGAs or processors.
Each TDC performs the function of a stopwatch and measures the elapsed time (time-of-flight or TOF) between a START pulse and up to five STOP pulses. The ability to measure simultaneously and individually on two pairs of START and STOP pins using two built-in TDCs offers high flexibility in time measurement design.
The device has an internal self-calibrated time base which compensates for drift over time and temperature. Self-calibration enables time-to-digital conversion accuracy in the order of picoseconds. This accuracy makes the TDC7201 ideal for range finder applications.
When placed in the Autonomous Multi-Cycle Averaging Mode, the TDC7201 device can be optimized for low system power consumption, which is ideal for battery-powered flow meters. In this mode, the host can go to sleep to save power and wake up when interrupted by the TDC upon completion of the measurement sequence.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TDC7201 | nFBGA (25) | 4.00 mm × 4.00 mm |
DATE | REVISION | NOTES |
---|---|---|
May 2016 | * | Initial release. |
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
A1 | START1 | Input | START signal for TDC1 |
A2 | TRIGG1 | Output | Trigger output signal for TDC1 |
A3 | ENABLE | Input | Enable signal to TDC |
A4 | VREG1 | Output | LDO output terminal for external decoupling cap |
A5 | SCLK | Input | SPI clock |
B1 | STOP1 | Input | STOP signal for TDC1 |
B2 | GND1 | Ground | Ground |
B3 | INTB1 | Output | Interrupt to MCU for TDC1, active low (open drain) |
B4 | VDD1 | Power | Supply input |
B5 | CSB1 | Input | SPI chip select for TDC1, active low |
C1 | CLOCK | Input | Clock input to TDC |
C2 | DNC | — | Do not connect |
C3 | DNC | — | Do not connect |
C4 | VDD2 | Power | Supply input |
C5 | DOUT1 | Output | SPI data output for TDC1 |
D1 | START2 | Input | START signal for TDC2 |
D2 | TRIGG2 | Output | Trigger output signal for TDC2 |
D3 | INTB2 | Output | Interrupt to MCU for TDC2, active low (open drain) |
D4 | DNC | — | Do not connect |
D5 | DIN | Input | SPI data input |
E1 | STOP2 | Input | STOP signal for TDC2 |
E2 | GND2 | Ground | Ground |
E3 | DOUT2 | Output | SPI data output for TDC2 |
E4 | VREG2 | Output | LDO output terminal for external decoupling cap |
E5 | CSB2 | Input | SPI chip select for TDC2, active low |