Follow these guidelines when designing the layout:
- Place decoupling capacitors as close to the VCC pins as possible. If possible, place the decoupling capacitors directly underneath the device.
- Tightly couple, skew match, and impedance control the high-speed differential signals TXnP/TXnN and RXnP/RXnN.
- Avoid vias when possible on the high-speed differential signals. Minimize the via stub when using vias, either by transitioning through most or all layers or by back drilling.
- GND relief is used beneath the high-speed differential signal pads to improve signal integrity by counteracting the pad capacitance. Using GND relief is not required.
- Place GND vias directly beneath the device connecting the GND plane attached to the device to the GND planes on other layers. GND vias have the added benefit of improving thermal conductivity from the device to the board.