SNLS766 July   2024 TDP20MB421

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 DC Electrical Characteristics
    6. 5.6 High-Speed Electrical Characteristics
    7. 5.7 SMBUS/I2C Timing Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 5-Level Control Inputs
      2. 6.3.2 Linear Equalization
      3. 6.3.3 Flat Gain
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Standby Mode
    5. 6.5 Programming
      1. 6.5.1 Pin Mode
      2. 6.5.2 SMBUS/I2C Register Control Interface
        1. 6.5.2.1 Shared Registers
        2. 6.5.2.2 Channel Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 DP 2.1 Mainlink Signal Conditioning
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 High-Speed Electrical Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
Receiver
RLRX-DIFFInput differential return loss50MHz to 1.25GHz­­–22dB
1.25GHz to 2.5GHz–22dB
2.5GHz to 4.0GHz–22dB
4.0GHz to 8.0GHz–16dB
8.0GHz to 12GHz–12dB
RLRX-CMInput common-mode return loss50MHz to 2.5GHz–20dB
2.5GHz to 8.0GHz–14dB
8.0GHz to 12GHz–10dB
XTRXReceive-side pair-to-pair isolationPair-to-pair isolation (SDD21) between two adjacent receiver pairs from 10MHz to 10GHz.–60dB
Transmitter
VTX-AC-CM-PPTx AC peak-to-peak common mode voltageMeasured with lowest EQ, GAIN = L4; PRBS7, 20Gbps, over at least 106 bits using a bandpass filter from 30kHz to 500MHz50mVpp
RLTX-DIFFOutput differential return loss50MHz to 1.25GHz–22dB
1.25GHz to 2.5GHz–22dB
2.5GHz to 4.0GHz–21dB
4.0GHz to 8.0GHz–15dB
8.0GHz to 12GHz–12dB
RLTX-CMOutput common-mode return loss50MHz to 2.5GHz–16dB
2.5GHz to 8.0GHz –12dB
8.0GHz to 12GHz–11dB
XTTXTransmit-side pair-to-pair isolationMinimum pair-to-pair isolation (SDD21) between two adjacent transmitter pairs from 10MHz to 10GHz.–60dB
Device data path
TPLHD/PHLDInput-to-output latency (propagation delay) through a data channelFor either low-to-high or high-to-low transition. 90130ps
LTX-SKEWLane-to-lane output skewBetween any two lanes within one transmitter. 20ps
TRJ-DATAAdditive random jitter with dataJitter through redriver minus the calibration trace. 20Gbps PRBS15. 800mVpp-diff input swing.70fs
JITTERTOTAL-DATAAdditive total jitter with dataJitter through redriver minus the calibration trace. 20Gbps PRBS15. 800mVpp-diff input swing.1.0ps
FLAT-GAINBroadband DC and AC flat gain - input to output, measured at DCMinimum EQ, GAIN1/0=L0 –5.6dB
Minimum EQ, GAIN1/0=L1 –3.8dB
Minimum EQ, GAIN1/0=L2 –1.2dB
Minimum EQ, GAIN1/0=L3 2.6dB
Minimum EQ, GAIN1/0=L4 (Float) 0.6dB
EQ-MAX16GEQ boost at maximum setting (EQ INDEX = 19) AC gain at 10GHz relative to gain at 100MHz. 19dB
LINEARITY-DCOutput DC linearityat 0dB flat gain1700mVpp
LINEARITY-ACOutput AC linearity at 20Gbpsat 0dB flat gain1050mVpp